Multiparametric degradation model of PMOSFETs under negative bias temperature stress

Negative bias temperature instability is a typical failure mechanism commonly found in P-channel power MOSFETs. When affected by the negative bias temperature stress, the gate oxide layer of PMOSFET will degrade, resulting in the degradation of device parameters. This degradation may lead to circuit failures and pose a significant threat to the reliability of elect ronic systems. The high-temperature gate bias test is used to assess the reliability of PMOSFETs under negative bias temperature stress. However, a significant limitation of current research is that it almost only focuses on the threshold voltage degradation of PMOSFET, ignoring the correlation between the initial threshold voltage value and degradation rate, as well as the interrelationship between threshold voltage and other parameters, which may lead to inaccurate reliability prediction. This paper overcomes the above shortcomings and proposes a method for establishing a multiparametric degradation model. Based on this method, the multiparametric degradation model for PMOSFETs under negative bias temperature stress is established, significantly improving the prediction accuracy of parameter standard deviation and multi parameter correlation coefficient.