Analog In-Memory Computing from a Memory-Agnostic Perspective: Theory, Nonidealities, and Hardware-Aware Training

Analog in-memory computing (AIMC) executes matrix-vector multiplications (MVMs) inside memory to alleviate the von Neumann bottleneck and improve energy efficiency. This tutorial classifies AIMC circuits in a memory-agnostic way, namely, current-domain, charge-domain, charge-redistribution, capacitive-division, resistive-division, and time-domain IMC. We explain each type of AIMC circuit with simple mathematical models. Furthermore, we review key device and circuit nonidealities (e.g., process variation, IR drop, sneak paths, and I/O quantization/ nonlinearity) with practical mitigation strategies in circuitry and peripherals. Finally, we organize hardware-aware training into three complementary families—probabilistic/precise modeling, physical modeling, and hardware-in-the-loop techniques—providing a mathematically grounded bridge between circuits and learning for robust, scalable AIMC accelerators.

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Publication Details

Journal
IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences
Published
2025-01-01
DOI
https://doi.org/10.1587/transfun.2025gci0001
Primary Topic
Advanced Memory and Neural Computing
Type
article
Field-Weighted Citation Impact
0.00

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article

Analog In-Memory Computing from a Memory-Agnostic Perspective: Theory, Nonidealities, and Hardware-Aware Training

Hiromitsu Awano, Yusuke Sakemi, Takashi Morie
IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences
Advanced Memory and Neural Computing
article

Analog In-Memory Computing from a Memory-Agnostic Perspective: Theory, Nonidealities, and Hardware-Aware Training

Hiromitsu Awano, Yusuke Sakemi, Takashi Morie
article en

Abstract

Analog in-memory computing (AIMC) executes matrix-vector multiplications (MVMs) inside memory to alleviate the von Neumann bottleneck and improve energy efficiency. This tutorial classifies AIMC circuits in a memory-agnostic way, namely, current-domain, charge-domain, charge-redistribution, capacitive-division, resistive-division, and time-domain IMC. We explain each type of AIMC circuit with simple mathematical models. Furthermore, we review key device and circuit nonidealities (e.g., process variation, IR drop, sneak paths, and I/O quantization/ nonlinearity) with practical mitigation strategies in circuitry and peripherals. Finally, we organize hardware-aware training into three complementary families—probabilistic/precise modeling, physical modeling, and hardware-in-the-loop techniques—providing a mathematically grounded bridge between circuits and learning for robust, scalable AIMC accelerators.

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences
Kyushu Institute of Technology (JP), Kyoto University (JP), Tokyo International University (JP), Chiba Institute of Technology (JP)
Japan Society for the Promotion of Science, Precursory Research for Embryonic Science and Technology
Openalex Percentile: Top 59%
Advanced Memory and Neural Computing
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