Improvement in electrical instability of atomic layer-deposited IGZO transistors through high-temperature annealing

This work systematically investigated the effect of various postdeposition annealing (PDA) temperatures on the electrical properties and stability of indium gallium zinc oxide (IGZO) transistors. First, utilizing a thermal ALD process, we achieved a high-performance field-effect transistor (FET) with mobility exceeding 28 cm2/V s and a subthreshold swing of 63 mV/dec over three decades of current. As the PDA temperatures increase, it was found that the hysteresis of IGZO FETs is less than 0.1 V, with subthreshold swings fluctuating between 60 and 80 mV/dec. However, the device threshold voltage (Vth) increased from −1.8 to −0.15 V at 550 °C. Simultaneously, the chemical binding states of IGZO films at different annealing temperatures were thoroughly analyzed. The results indicate that after high-temperature annealing, the proportion of M–O bonds increased from 65.8% to 77.7%, effectively removing carbon-hydrogen ligands from residual precursors in IGZO thin films. Simultaneously, there was a significant reduction in the concentration of oxygen vacancy defects and oxygen-related impurities, resulting in a stable IGZO channel that enhanced the electrical stability of the device under a high gate bias stress of ±2.5 MV/cm. The results indicated that, under 550 °C annealing, the Vth shift of the IGZO FET was +0.06 V under positive bias stress and −0.12 V under negative bias stress, demonstrating excellent reliability.