Generating an AES11-compatible media clock in a System-on-Chip (SoC) for use in real-time audio streaming via AoIP

The transmission of high-quality, low-latency audio over IP (AoIP) networks demands precise synchronization of distributed devices, particularly through alignment of local media clocks to a global reference via IEEE 1588 Precision Time Protocol (PTP). A media clock is a high-precision timing signal used to control the sampling, playback, or recording of digital media—typically audio or video—at a consistent and accurate rate. It ensures that all devices in a network play out or capture audio samples in perfect temporal alignment.The generation of media clocks for AoIP systems remains an open challenge, as no widely adopted standard or open-source reference design currently exists. Existing solutions are typically implemented on FPGAs, often relying on proprietary architectures with limited transparency and accessibility. The only established guideline is the AES11 standard, which specifies stringent requirements for such clocks—limiting jitter to ±5% of the sample period—and has been adopted in AES67 and RAVENNA. This lack of standardized or openly available implementations, however, leaves the practical derivation of a stable, PTP-synchronized media clock largely unclear.To address this gap, this paper presents a hardware–software co-design methodology for deriving an AES11-compliant media clock from IEEE 1588 PTP. The proposed approach combines the Common Platform Time Sync (CPTS) module of Texas Instruments’ AM62x System-on-Chip (SoC) with the LMK05318B jitter-cleaning clock generator. By leveraging a pulse-per-second (PPS) signal phase-locked to a PTP grandmaster, the system achieves sub-100 ns alignment accuracy and 35 ps RMS jitter, surpassing AES11 requirements.The implementation demonstrates how cost-efficient embedded platforms without native media clocking capabilities can be adapted for professional AoIP systems such as AES67, while maintaining interoperability and scalability. Although validated on the AM62x and LMK05318B, the methodology is transferable to other embedded platforms featuring PTP-based timestamping and any clock synchronizer supporting IEEE 1588.

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Published
2025-10-29
DOI
https://doi.org/10.1109/is264627.2025.11284589
Primary Topic
Network Time Synchronization Technologies
Type
article
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article

Generating an AES11-compatible media clock in a System-on-Chip (SoC) for use in real-time audio streaming via AoIP

Thorben Kron, Zain Alabedin Alishammat
Network Time Synchronization Technologies
article

Generating an AES11-compatible media clock in a System-on-Chip (SoC) for use in real-time audio streaming via AoIP

Thorben Kron, Zain Alabedin Alishammat
article en

Abstract

The transmission of high-quality, low-latency audio over IP (AoIP) networks demands precise synchronization of distributed devices, particularly through alignment of local media clocks to a global reference via IEEE 1588 Precision Time Protocol (PTP). A media clock is a high-precision timing signal used to control the sampling, playback, or recording of digital media—typically audio or video—at a consistent and accurate rate. It ensures that all devices in a network play out or capture audio samples in perfect temporal alignment.The generation of media clocks for AoIP systems remains an open challenge, as no widely adopted standard or open-source reference design currently exists. Existing solutions are typically implemented on FPGAs, often relying on proprietary architectures with limited transparency and accessibility. The only established guideline is the AES11 standard, which specifies stringent requirements for such clocks—limiting jitter to ±5% of the sample period—and has been adopted in AES67 and RAVENNA. This lack of standardized or openly available implementations, however, leaves the practical derivation of a stable, PTP-synchronized media clock largely unclear.To address this gap, this paper presents a hardware–software co-design methodology for deriving an AES11-compliant media clock from IEEE 1588 PTP. The proposed approach combines the Common Platform Time Sync (CPTS) module of Texas Instruments’ AM62x System-on-Chip (SoC) with the LMK05318B jitter-cleaning clock generator. By leveraging a pulse-per-second (PPS) signal phase-locked to a PTP grandmaster, the system achieves sub-100 ns alignment accuracy and 35 ps RMS jitter, surpassing AES11 requirements.The implementation demonstrates how cost-efficient embedded platforms without native media clocking capabilities can be adapted for professional AoIP systems such as AES67, while maintaining interoperability and scalability. Although validated on the AM62x and LMK05318B, the methodology is transferable to other embedded platforms featuring PTP-based timestamping and any clock synchronizer supporting IEEE 1588.

Fraunhofer Institute for Open Communication Systems (DE)
Openalex Percentile: Top 54%
Network Time Synchronization Technologies
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Generating an AES11-compatible media clock in a System-on-Chip (SoC) for use in real-time audio streaming via AoIP — Thorben Kron, Zain Alabedin Alishammat · (2025) | TGRS Research Map | TGRS