A Novel Step‐Up Converter With Lower Ripple and RHP Zero Elimination
ABSTRACT The paper presents a novel step‐up converter featuring ultralow output ripple and elimination of right‐half‐plane (RHP) zeros, making it suitable for high‐precision and high‐reliability boost applications. The equivalent circuit of the proposed topology is established using the T‐equivalent model of the transformer. Based on this model, a systematic analysis reveals that the proposed topology is functionally equivalent to cascaded Buck converters superimposed with the input DC voltage, where the number of stages is determined by the transformer turns ratio. As a result, the proposed converter offers a linear boost characteristic while inheriting the advantages of Buck converters. Compared to existing methods for eliminating RHP zeros, this topology exhibits superior overall performance, including reduced voltage stress of semiconductors, a lower component count, and a simplified circuit structure. In addition, unlike conventional interleaved boost converters that mitigate output ripple through structural redundancy, the proposed approach suppresses output voltage ripple naturally. The theoretical steady‐state performance is experimentally verified by means of a semi‐physical platform and a prototype under various operating conditions.
Authors
- Xijun Yang (ORCID: https://orcid.org/0000-0002-2043-9243)
- Siwen Ye (ORCID: https://orcid.org/0009-0002-0892-7225)
- Mingou Wei
- Jiawei Zhu
Institutions
- Shanghai Jiao Tong University (CN)
Publication Details
- Journal
- IET Power Electronics
- Published
- 2025-01-01
- DOI
- https://doi.org/10.1049/pel2.70138
- Primary Topic
- Advanced DC-DC Converters
- Type
- article
- Field-Weighted Citation Impact
- 0.00