High-density three-dimensional integration of dynamic random-access memory using vertical dual-gate IGZO TFTs

An architecture for three-dimensional integration of dynamic random-access memory that enables higher memory density is presented as a new solution to the bottleneck currently faced in artificial intelligence deployment. The basis of this architecture is a vertical dual-gate two-transistors-zero-capacitor memory cell which yields a small feature size and reliable read operation, and naturally scalable to large-scale arrays. However, three-dimensional integration of the dynamic random-access memory faces highly-limiting challenges related to lateral misalignment and thermal cycling as a result of separate stacking processes. To solve the issues of cell misalignment and thermal cycling, a single step process is used to stack the dual-gate In-Ga-Zn-O transistors simultaneously. By optimizing the contact metallization and its interface through an in-situ ozone oxidation method, the vertical dual-gate transistor exhibits a high on-state current and small subthreshold slope as well as high thermal stability and device variation. Furthermore, a four-bit multi-bit operation is demonstrated with an ultra-scaled 4F<sup>2</sup> two-transistors-zero-capacitor dynamic random-access memory to further increase the storage density. The approach presented here provides a promising alternative to high-density three-dimensional dynamic random-access memory integration as a means for more efficient near memory computing for artificial intelligence systems.

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Publication Details

Journal
Nature Communications
Published
2025-12-08
DOI
https://doi.org/10.1038/s41467-025-65925-3
Primary Topic
Thin-Film Transistor Technologies
Type
article
Field-Weighted Citation Impact
0.00

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article

High-density three-dimensional integration of dynamic random-access memory using vertical dual-gate IGZO TFTs

Jinghong Shi, Wendong Lu, K. Chen, Lingfei Wang et al.
Nature Communications
Thin-Film Transistor Technologies
article

High-density three-dimensional integration of dynamic random-access memory using vertical dual-gate IGZO TFTs

Jinghong Shi, Wendong Lu, K. Chen, Lingfei Wang, Meichen Jin, Congyan Lu, Xie-Shuai Wu, Bok-Moon Kang, Arokia Nathan, Jinshan Yue, Fuxi Liao, Nannan Mao, Jiawei Wang, Di Geng, Guilei Wang, Guanhua Yang, Menggan Liu, Yong Yu, Ming Liu, Chang Liu, Zijing Wu, Ling Li, Chao Zhao, Zihan Li, Jing Zhang, Xuanming Zhang, Nianduan Lu, Zhengyong Zhu
article en

Abstract

An architecture for three-dimensional integration of dynamic random-access memory that enables higher memory density is presented as a new solution to the bottleneck currently faced in artificial intelligence deployment. The basis of this architecture is a vertical dual-gate two-transistors-zero-capacitor memory cell which yields a small feature size and reliable read operation, and naturally scalable to large-scale arrays. However, three-dimensional integration of the dynamic random-access memory faces highly-limiting challenges related to lateral misalignment and thermal cycling as a result of separate stacking processes. To solve the issues of cell misalignment and thermal cycling, a single step process is used to stack the dual-gate In-Ga-Zn-O transistors simultaneously. By optimizing the contact metallization and its interface through an in-situ ozone oxidation method, the vertical dual-gate transistor exhibits a high on-state current and small subthreshold slope as well as high thermal stability and device variation. Furthermore, a four-bit multi-bit operation is demonstrated with an ultra-scaled 4F<sup>2</sup> two-transistors-zero-capacitor dynamic random-access memory to further increase the storage density. The approach presented here provides a promising alternative to high-density three-dimensional dynamic random-access memory integration as a means for more efficient near memory computing for artificial intelligence systems.

Nature CommunicationsVol. 16(1)
Qingdao University (CN), Chinese Academy of Sciences (CN), University of Cambridge (GB), Beijing Film Academy (CN), Institute of Microelectronics (SG), Institute of Microelectronics (CN)
National Natural Science Foundation of China, Youth Innovation Promotion Association
Openalex Percentile: Top 60%
Thin-Film Transistor Technologies
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