Mobility of Carriers in Strong Inversion Layers Associated with Threshold Voltage for Gated Transistors

NMOSFET, whose gate is on the top of the n-p-n junction with gate oxide in between, is called the n-channel transistor. This bipolar junction underneath the gate oxide may provide an n-n-n-conductive channel as the gate is applied with a positive bias over the threshold voltage (V<sub>th</sub>). Conceptually, the definition of an n-type or p-type semiconductor depends on whether the corresponding Fermi energy is higher or lower than the intrinsic Fermi energy, respectively. The positive bias applied to the gate would bend down the intrinsic Fermi energy until it is lower than the original p-type Fermi energy, which means that the p-type becomes strongly inverted to become an n-type. First, the thickness of the inversion layer is derived and presented in a planar 40 nm MOSFET, a 3D 240 nm FinFET, and a power discrete IGBT, with the help of the p (1/m<sup>3</sup>) of the p-type semiconductor. Different ways of finding p (1/m<sup>3</sup>) are, thus, proposed to resolve the strong inversion layers. Secondly, the conventional formulas, including the triode region and saturation region, are already modified, especially in the triode region from a continuity point of view. The modified formulas then become necessary and available for fitting the measured characteristic curves at different applied gate voltages. Nevertheless, they work well but not well enough. Thirdly, the electromagnetic wave (EM wave) generated from accelerating carriers (radiation by accelerated charges, such as synchrotron radiation) is proposed to demonstrate phonon scattering, which is responsible for the Source-Drain current reduction at the adjoining of the triode region and saturation region. This consideration of reduction makes the fitting more perfect. Fourthly, the strongly inverted layer may be formed but not conductive. The existing trapping would stop carriers from moving (nearly no mobility, μ) unless the applied gate bias is over the threshold voltage. The quantum confinement addressing the quantum well, which traps the carriers, is to be estimated.

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Journal
Micromachines
Published
2025-12-09
DOI
https://doi.org/10.3390/mi16121393
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
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article

Mobility of Carriers in Strong Inversion Layers Associated with Threshold Voltage for Gated Transistors

Sung-Ching Chi, Tai-Hsiang Lai, Bohao Huang, Han-Ya Yang et al.
Micromachines
Advancements in Semiconductor Devices and Circuit Design
article

Mobility of Carriers in Strong Inversion Layers Associated with Threshold Voltage for Gated Transistors

Sung-Ching Chi, Tai-Hsiang Lai, Bohao Huang, Han-Ya Yang, Hsin-Chia Yang
article en

Abstract

NMOSFET, whose gate is on the top of the n-p-n junction with gate oxide in between, is called the n-channel transistor. This bipolar junction underneath the gate oxide may provide an n-n-n-conductive channel as the gate is applied with a positive bias over the threshold voltage (V<sub>th</sub>). Conceptually, the definition of an n-type or p-type semiconductor depends on whether the corresponding Fermi energy is higher or lower than the intrinsic Fermi energy, respectively. The positive bias applied to the gate would bend down the intrinsic Fermi energy until it is lower than the original p-type Fermi energy, which means that the p-type becomes strongly inverted to become an n-type. First, the thickness of the inversion layer is derived and presented in a planar 40 nm MOSFET, a 3D 240 nm FinFET, and a power discrete IGBT, with the help of the p (1/m<sup>3</sup>) of the p-type semiconductor. Different ways of finding p (1/m<sup>3</sup>) are, thus, proposed to resolve the strong inversion layers. Secondly, the conventional formulas, including the triode region and saturation region, are already modified, especially in the triode region from a continuity point of view. The modified formulas then become necessary and available for fitting the measured characteristic curves at different applied gate voltages. Nevertheless, they work well but not well enough. Thirdly, the electromagnetic wave (EM wave) generated from accelerating carriers (radiation by accelerated charges, such as synchrotron radiation) is proposed to demonstrate phonon scattering, which is responsible for the Source-Drain current reduction at the adjoining of the triode region and saturation region. This consideration of reduction makes the fitting more perfect. Fourthly, the strongly inverted layer may be formed but not conductive. The existing trapping would stop carriers from moving (nearly no mobility, μ) unless the applied gate bias is over the threshold voltage. The quantum confinement addressing the quantum well, which traps the carriers, is to be estimated.

MicromachinesVol. 16(12)
Minghsin University of Science and Technology (TW), National Yang Ming Chiao Tung University (TW)
Openalex Percentile: Top 60%
Advancements in Semiconductor Devices and Circuit Design
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