Design and analysis of a single-stage cascode LNA for S-band application in 180-nm CMOS technology

Abstract This paper presents a high-gain, single-stage cascode low noise amplifier (LNA) tailored for S-band applications, implemented in a 180-nm CMOS process. The design employs a common-source cascode topology with inductive degeneration, enabling a careful trade-off between gain, noise figure, and input matching. Schematic simulations indicate a peak gain of 53.2 dB and a low noise figure of 1.51-1.74 dB across the S-band, with excellent impedance matching. The amplifier is unconditionally stable and occupies a compact core area of only 0.175 mm². Operating with a power consumption of 45 mW, these results demonstrate that the proposed LNA provides a competitive, area-efficient, and robust solution for modern S-band wireless systems, achieving performance levels comparable to more complex multi-stage architectures while maintaining simplicity and design efficiency. The design also achieves excellent reverse isolation ( S 12 < –48 dB), output matching ( S 22 = –12.75 dB), and unconditional stability ( K > 1), further demonstrating the robustness of the proposed LNA.