Evaluation of the robustness of the defect-centric model for defect parameter extraction from RTN and BTI analysis using Comphy

Advanced reliability simulators like Comphy capture much of the state-of-the-art modeling behind charge trapping processes. An alternative approach to Comphy is to apply stochastic models, e.g. the defect-centric model, directly to the experimental data to extract the impact of defects on the device behavior and trap densities. In order to efficiently design defect characterization experiments, however, it is of utmost importance to understand the robustness of the defect-centric model under a variety of pre-conditions. In this work, we evaluate the requirements to employ the defect-centric model for data analysis, using simulated data from Comphy based on a real 400 nm × 180 nm pMOS device. Our results show that the number of devices from wafer-level tests does not suffice for statistical evaluation of RTN analysis. Here, preferably array chips should be used. For BTI studies, both wafer-level and array-chip tests enable us to extract good estimates for defect parameters with little computational effort. • Defect centric model for noise analysis • Key SNR and sample sizes for reliable defect experiments identified • Comphy extended to generate time-domain RTN/BTI ensembles via NMP. • RTN needs 500 devices; array chips required for robust statistics.

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Publication Details

Journal
Microelectronic Engineering
Published
2025-12-05
DOI
https://doi.org/10.1016/j.mee.2025.112436
Primary Topic
VLSI and Analog Circuit Testing
Type
article
Field-Weighted Citation Impact
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article

Evaluation of the robustness of the defect-centric model for defect parameter extraction from RTN and BTI analysis using Comphy

Walter Pflanzl, Rainer Minixhofer, Tibor Grasser, Michael Waltl et al.
Microelectronic Engineering
VLSI and Analog Circuit Testing
article

Evaluation of the robustness of the defect-centric model for defect parameter extraction from RTN and BTI analysis using Comphy

Walter Pflanzl, Rainer Minixhofer, Tibor Grasser, Michael Waltl, E.G. Ioannidis, Bernhard Stampfer, Florian Wimmer, Martin E. M. Loesener, Tobias Zinsler
article en

Abstract

Advanced reliability simulators like Comphy capture much of the state-of-the-art modeling behind charge trapping processes. An alternative approach to Comphy is to apply stochastic models, e.g. the defect-centric model, directly to the experimental data to extract the impact of defects on the device behavior and trap densities. In order to efficiently design defect characterization experiments, however, it is of utmost importance to understand the robustness of the defect-centric model under a variety of pre-conditions. In this work, we evaluate the requirements to employ the defect-centric model for data analysis, using simulated data from Comphy based on a real 400 nm × 180 nm pMOS device. Our results show that the number of devices from wafer-level tests does not suffice for statistical evaluation of RTN analysis. Here, preferably array chips should be used. For BTI studies, both wafer-level and array-chip tests enable us to extract good estimates for defect parameters with little computational effort. • Defect centric model for noise analysis • Key SNR and sample sizes for reliable defect experiments identified • Comphy extended to generate time-domain RTN/BTI ensembles via NMP. • RTN needs 500 devices; array chips required for robust statistics.

Microelectronic EngineeringVol. 303
Openalex Percentile: Top 57%
VLSI and Analog Circuit Testing
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Evaluation of the robustness of the defect-centric model for defect parameter extraction from RTN and BTI analysis using Comphy — Walter Pflanzl, Rainer Minixhofer, et al. · Microelectronic Engineering (2025) | TGRS Research Map | TGRS