Readout and testing procedures to characterize the CMS inner tracker pixel detector for HL-LHC

The LHC will be upgraded to the High Luminosity LHC in the coming years, aiming to reach an instantaneous luminosity of up to $5 \times 10^{34}$ cm$^{-2}$s$^{-1}$. The CMS Tracker detectors will be replaced and significantly upgraded to cope with the increased radiation fluence while ensuring excellent performance. In particular, a new hybrid pixel detector chip was developed for the Inner Tracker detector (ROC). The chip is capable of coping with extreme hit rates of up to 3 GHz/cm$^2$ ($\sim$12 GHz per chip), together with a trigger rate of $\sim 1$ MHz, and features an efficient readout rate of up to 5.12 Gbits/s. The chip exhibits radiation tolerance of up to 1 Grad and an induced single-event upset rate of up to 100 upsets per second. The new Inner Tracker will have six times smaller area pixels covering a surface close to 5 m$^2$, thus resulting in approximately two billion pixels over about 3900 modules. The individual detector modules will need to be characterized and calibrated before being mounted on the final detector structure. To this extent, a dedicated data acquisition system (DAQ), based on minimal hardware featuring a custom FPGA board, was developed. A description of the DAQ, the testing procedures, and experience with the ROC is presented in this document.