Investigation of the Self-Heating Effect in a P-Channel VDMOS Transistor After NBT Stress and Relaxation

This study investigates the self-heating effect (SHE) in p-channel VDMOS transistors under dynamic stress conditions. SHE was measured on IRF9520 devices in fresh samples, as well as after negative bias temperature (NBT) stress and subsequent relaxation treatments. Thermal analysis was conducted using pulsed gate signals with a 50% duty cycle and rise/fall times of 5 ns, 100 ms, and 250 ms, at fixed drain current levels of 0.5 A, 1 A, 1.5 A, and 2 A to assess temperature variations in both fresh devices and components previously subjected to NBT stress and thermal relaxation. The goal was to investigate the operating conditions of the component when they are integrated into an actual electronic system.