Software and Hardware Implementations of a Cyber-Physical Firewall
This study evaluates software and hardware implementations based on the Cyber-Physical Firewall (CPFW) framework, which provides a flexible and generic access control mechanism for regulating malicious analog signals targeting cyber-physical systems. We describe the CPFW framework design and the implementation strategies for both software and hardware. The software implementation was performed on a Raspberry Pi, whereas the hardware implementation was performed on a Zybo Z7-10 SoC board. We evaluate the characteristics of each implementation, particularly for audio signals, and discuss the differences that arise between software and hardware implementations, along with the selection of an appropriate approach based on specific requirements. The evaluation results demonstrate that the software implementation of the CPFW framework has an overhead of 3.219 ms, whereas the hardware implementation has an overhead of 310 ns, indicating a difference in overhead of \(10^{4}\) . The hardware implementation resulted in only a 5.88% increase in resource utilization owing to the addition of CPFW circuits, indicating that the added circuit size is practical for real-world applications.
Authors
- Ryo Iijima (ORCID: https://orcid.org/0000-0001-5766-0411)
- Tatsuya Takehisa (ORCID: https://orcid.org/0000-0001-9350-6091)
- Tatsuya Mori (ORCID: https://orcid.org/0000-0003-1583-4174)
Institutions
- Waseda University (JP)
- National Institute of Advanced Industrial Science and Technology (JP)
- National Institute of Information and Communications Technology (JP)
Publication Details
- Journal
- ACM Transactions on Cyber-Physical Systems
- Published
- 2025-12-02
- DOI
- https://doi.org/10.1145/3777453
- Primary Topic
- Network Packet Processing and Optimization
- Type
- article
- Field-Weighted Citation Impact
- 0.00