Impact of Different PCB Designs on the Switching Speed of GaN Transistors for Nanosecond Pulse Generation
Gallium nitride high-electron-mobility transistors (GaN HEMTs) offer ultrafast switching capabilities due to their low parasitic components and reduced gate charge requirements. These properties make them well-suited for plasma generation applications, where faster switching operations enhance plasma yield efficiency. Notably, higher switching speeds can be achieved by using an optimized gate driver with high driving current capability and fast rise/fall times. The external and internal parasitics within the gate loop influence the current delivered to the gate, thus significantly impacting the switching speed of GaN transistors. This paper investigates the effects of parasitics associated with two different gate drivers, specifically monolithic Si-based and GaN-based voltage-source drivers, on the rise time of 650 V GaN transistors. For experimental verification, three versions of the monolithic Si-based driver and two versions of the voltage-source driver were constructed. The primary 650 V transistor was evaluated in pulsed operation with a resistive load, reaching pulse voltages and currents of up to 610 V and 107 A, respectively. Experimental results show that, with the monolithic Si-based gate driver, the current rise rate ranges from <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$24.74 \text{kA}/\mu \mathrm{s}$</tex> to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$26.87 \text{kA}/\mu \mathrm{s}$</tex> across different designs. Similarly, the current rise rate for the two voltage-source gate driver versions, at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V_{V G D}=7 \mathrm{V}$</tex>, were <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$32.67 \text{kA}/\mu \mathrm{s}$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$36.64 \text{kA}/\mu \mathrm{s}$</tex>, respectively. The differences in rise times are attributed to variations in PCB design, resulting in different parasitic loop inductances.
Authors
- T. Huiskamp (ORCID: https://orcid.org/0000-0002-8450-2600)
- Bas Vermulst (ORCID: https://orcid.org/0000-0001-9019-6147)
- Mohsen Feizi
Publication Details
- Published
- 2025-06-15
- DOI
- https://doi.org/10.1109/ppps56198.2025.11248746
- Primary Topic
- GaN-based semiconductor devices and materials
- Type
- article
- Field-Weighted Citation Impact
- 0.00