Modeling and Design Automation of Fault-Tolerant Digitally Controlled Ring Oscillators

Accurate modeling of Digitally Controlled Ring Oscillators (DCROs) is crucial for optimizing their performance in Phase-Locked Loops (PLLs) and other high-speed applications. This paper presents a systematic approach to model the frequency and power characteristics of Resistively Decoupled Unit Cell (RDUC)-based DCROs, using an Elmore delay model with nonlinear characterization of RDUC delays. The proposed method efficiently characterizes key parameters, enabling DCRO design automation. Additionally, the RDUC architecture improves radiation hardness, making it ideal for harsh environment applications. This computationally efficient approach enables rapid simulation, significantly reducing design time. The model's accuracy is validated through experimental results on a 65 nm CMOS test chip.