Lightweight Configurable Delay-Based LFSR PUF Design on FPGA

Physical Unclonable Functions (PUFs) are hardware-based security primitives that can produce unique digital identifiers from electronic devices. They are particularly useful for Internet of Things (IoT) applications due to their low cost and ability to improve security on lightweight devices. In this paper, we propose a new lightweight delay-based Linear Feedback Shift Register (LFSR) PUF with configurable primitive feedback. Our configurable PUF offers various important benefits, such as a compact architecture, low hardware overhead, a large challenge-response space, conservative power requirements, and flexibility to operate in different modes. We implement our proposed PUF on an FPGA, and the experimental results demonstrate that our PUF exhibits nearly ideal performance metrics in terms of uniformity and uniqueness, with minimal hardware overhead and low power consumption. Moreover, our PUF also passes the National Institute of Standards and Technology (NIST) statistical test suite. We also show that our proposed PUF is resistant to Machine Learning (ML) attacks.