A Generic SVPWM Method of Suppressing Common-Mode Voltages for Multilevel Converters
Multilevel converters are widely used in various industrial applications. One of the critical challenges in these systems is the suppression of common-mode voltage (CMV). Due to the intuitive nature of the space vector diagram, space vector PWM (SVPWM) can effectively regulate CMV. However, as the number of voltage levels in multilevel converters increases, the complexity of the SVPWM method also grows. Existing simplified SVPWM techniques, which are helpful, have not been fully successful in suppressing the CMV. To address the above issues, this paper proposes a generic SVPWM (GSVPWM) method. Unlike conventional approaches, the GSVPWM is based on the natural abc coordinate system, eliminating the need for coordinate transformations. In addition to effectively suppressing both the magnitude and frequency of the CMV, the GSVPWM further reduces the dv/dt values of the CMV by subdividing the equilateral triangular sectors into obtuse triangular sectors. The proposed method operates in real-time, without requiring look-up tables or complex calculations. It is easy to implement across different multilevel converters. Simulations and the experiments are conducted in a five-level converter to verify the effectiveness of the proposed GSVPWM.
Authors
- Xing Dong (ORCID: https://orcid.org/0000-0001-6367-8386)
- Frede Blaabjerg (ORCID: https://orcid.org/0000-0001-8311-7412)
- Xiangyang Xing (ORCID: https://orcid.org/0000-0001-7078-7783)
- Chang Liu (ORCID: https://orcid.org/0000-0002-3209-2267)
- Chenghui Zhang (ORCID: https://orcid.org/0000-0003-2317-5930)
- Zhaonan Li (ORCID: https://orcid.org/0009-0006-9823-3495)
Institutions
- Shandong University (CN)
- Aalborg University (DK)
Publication Details
- Journal
- IEEE Transactions on Power Electronics
- Published
- 2025-11-25
- DOI
- https://doi.org/10.1109/tpel.2025.3637072
- Primary Topic
- HVDC Systems and Fault Protection
- Type
- article
- Field-Weighted Citation Impact
- 0.00