Knock-Knock: Black-Box, Platform-Agnostic DRAM Address-Mapping Reverse Engineering
Modern Systems-on-Chip (SoCs) employ undocumented linear address-scrambling functions to obfuscate DRAM addressing, which complicates DRAM-aware performance optimizations and hinders proactive security analysis of DRAM-based attacks; most notably, Rowhammer. Although previous work tackled the issue of reversing physical-to-DRAM mapping, existing heuristic-based reverse-engineering approaches are partial, costly, and impractical for comprehensive recovery. This paper establishes a rigorous theoretical foundation and provides efficient practical algorithms for black-box, complete physical-to-DRAM address-mapping recovery. We first formulate the reverse-engineering problem within a linear algebraic model over the finite field GF(2). We characterize the timing fingerprints of row-buffer conflicts, proving a relationship between a bank addressing matrix and an empirically constructed matrix of physical addresses. Based on this characterization, we develop an efficient, noise-robust, and fully platform-agnostic algorithm to recover the full bank-mask basis in polynomial time, a significant improvement over the exponential search from previous works. We further generalize our model to complex row mappings, introducing new hardware-based hypotheses that enable the automatic recovery of a row basis instead of previous human-guided contributions. Evaluations across embedded and server-class architectures confirm our method's effectiveness, successfully reconstructing known mappings and uncovering previously unknown scrambling functions. Our method provides a 99% recall and accuracy on all tested platforms. Most notably, Knoc-Knock runs in under a few minutes, even on systems with more than 500GB of DRAM, showcasing the scalability of our method. Our approach provides an automated, principled pathway to accurate DRAM reverse engineering.
Authors
- Thomas Rokicki (ORCID: https://orcid.org/0000-0002-7041-4300)
- Rubén Salvador (ORCID: https://orcid.org/0000-0002-0021-5808)
- Lorenzo Casalino
- Antoine Plin
Institutions
- Centre National de la Recherche Scientifique (FR)
- Georgia Institute of Technology (US)
- Institut de Recherche en Informatique et Systèmes Aléatoires (FR)
- CentraleSupélec (FR)
- Vinci (France) (FR)
- Ecole Supérieure d'Ingénieurs Léonard de Vinci (FR)
Publication Details
- Journal
- Proceedings of the Microarchitecture Security Conference
- Published
- 2026-02-03
- DOI
- https://doi.org/10.46586/uasc.2026.007
- Primary Topic
- Security and Verification in Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Agence Nationale de la Recherche
- Centre National de la Recherche Scientifique