Side-wall metallization process for enhanced electrical contact in SOI-based MEMS switches
MEMS inertial switches provide a zero-power alternative to conventional accelerometers by mechanically closing an electrical contact only when a specific acceleration threshold is exceeded. However, conventional SOI-based MEMS switches suffer from high silicon-to‑silicon contact resistance, which degrades signal reliability and limits device performance. This work presents a novel fabrication process that enables selective metal coating of contact side-wall in SOI-based MEMS inertial switches, aiming to reduce contact resistance while maintaining compatibility with standard MEMS bulk micromachining process flows. The proposed method introduces a pre-release metallization sequence combining deep reactive ion etching (DRIE), EKC-based cleaning, directional sputtering of an aluminum alloy, and a photosensitive polyimide (PI) masking process, followed by chemical mechanical planarization (CMP). This integration eliminates the need for post-release processing or dry-film resists and ensures alignment with SOI process constraints. Optical and scanning electron microscopy (SEM) inspection confirmed proper pattern transfer, trench formation, and planarization, while energy-dispersive X-ray spectroscopy (EDX) analysis revealed partial side-wall metal coverage, predominantly on upper regions due to shadowing effects induced by DRIE scalloping. Electrical measurements demonstrated a reduction in contact resistance from over 3 kΩ to 200 Ω in metallized areas. Although out-of-plane misalignment between electrodes (≈250 nm) limited reliable Al Al contact formation, the demonstrated process provides a scalable approach to create low-resistance contacts in bulk-micromachined MEMS switches and establishes a foundation for future optimization through thicker or alternative metal depositions. • Side-wall metallization integrated in SOI MEMS switches before release. • Process avoids dry films and post-release metal deposition steps. • SEM and EDX confirm selective side-wall metal coverage. • Contact resistance reduced from 3 kΩ to 200 Ω in metalized regions.
Authors
- Carlos Ferreira (ORCID: https://orcid.org/0000-0001-9488-5003)
- Jorge M. Pereira (ORCID: https://orcid.org/0000-0002-7594-3535)
- Rosana A. Dias (ORCID: https://orcid.org/0000-0002-3877-0946)
- Fahimullah Khan (ORCID: https://orcid.org/0000-0001-6471-9602)
- Jorge Cabral (ORCID: https://orcid.org/0000-0001-9954-9746)
- Inês S. Garcia (ORCID: https://orcid.org/0000-0002-4605-6961)
- J. Fernandes (ORCID: https://orcid.org/0000-0002-1620-7618)
- Filipe S. Alves (ORCID: https://orcid.org/0000-0002-3439-8235)
- Carlos Calaza (ORCID: https://orcid.org/0000-0001-7708-3842)
- Filipa C. Mota (ORCID: https://orcid.org/0009-0003-8990-8145)
Institutions
- Universidade do Porto (PT)
- International Iberian Nanotechnology Laboratory (PT)
Publication Details
- Journal
- Micro and Nano Engineering
- Published
- 2025-11-20
- DOI
- https://doi.org/10.1016/j.mne.2025.100338
- Primary Topic
- Advanced MEMS and NEMS Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00