Using the Dark Count Rate of SPAD Implemented in CMOS FD-SOI Technology for True Random Number Generator

The objective of this study is to generate random numbers using Single Photon Avalanche Diode (SPAD) native noise, specifically the Dark Count Rate (DCR). This is achieved by counting events over a fixed acquisition time window and creating a sequence of random bits using the least significant bits of the counter. A simple model was developed to evaluate the concept, which was then implemented on noisy SPADs integrated in CMOS Fully Depleted Silicon-On-Insulator (FD-SOI) technology, resulting in a compact 3D cell. The study tested the randomness quality of the measured bit sequences under various operating conditions, including voltage and temperature. The results indicate that the measured bit sequences pass successfully the NIST randomness quality tests under specific operating conditions. It is recommended to use the least significant bit and work with a sufficiently high excess voltage.