BEOL Film Crack Mechanical Reliability Mitigation

Flip chip (FC) packaging technology with copper bump interconnects has been widely used for highly integrated semiconductors to meet specific industrial requirements, contributing to dramatic body-downsizing, fine pitch, and improved electrical and thermal performance. However, FC copper bump interconnects are susceptible to mechanical reliability issues like interfacial delamination and inter-layer dielectric (ILD) passivation film cracks, while under reliability testing due to the marginality of fracture strength with the brittle mechanical behavior of BEOL film layers. For example, in a flip-chip chip-scale-package (FCCSP) device, especially one with copper bumps, an ILD crack was observed under temperature cycling (TC) loading. The crack was consistent with the new failure mode (i.e., the unique inter-layer mechanical interaction due to aggressive stacking), thus necessitating new design considerations for future devices and other multi-layer substrate package technologies. This paper comprehensively investigates this new failure mode, the root cause, and the innovative mitigation approach. This study developed the finite-element-analysis (FEA) based silicon (Si)-die level and package-level models to understand the root cause of ILD/passivation film crack risk. Additionally, the metal density transition impact on the top-metal layer (METTOP) to package metal interaction created a unique crack initiation and propagation situation to evaluate.