Fabrication and Packaging of Edge Coupled Silicon Nitride Photonic Integrated Circuits on Glass Substrates for High Performance Interposers

Silicon nitride photonic integrated circuits were fabricated on glass substrates for the first time using reactive ion etched edge facets, demonstrating a minimum propagation loss of 2.4 ± 0.36 dB/cm and minimum edge coupling loss of 2.17 ± 0.79 dB. Two sets of processes were developed: one including high temperature steps (T > 350°C) common to complimentary-metal-oxide-semiconductor (CMOS) foundry front-end-of-line tools and one including low temperature steps (T < 350°C) compatible with CMOS foundry back-end-of-line tools. For both the high and low temperature samples, a CMOS foundry compatible process was also established for dry etching edge facets > 85 𝜇m deep into SiO2 substrates using magnetically enhanced reactive ion etching with amorphous silicon hard masks without metal. Results show the viability of this glass interposer to help achieve Pbps co-packaged optics switch performance by addressing the material limitations of organic or silicon based interposers and enabling pick-and-place assembly of photonic die to package level integrated photonic waveguides.

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Publication Details

Journal
IMAPSource Proceedings
Published
2025-11-10
DOI
https://doi.org/10.4071/001c.147207
Primary Topic
Photonic and Optical Devices
Type
article
Field-Weighted Citation Impact
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article

Fabrication and Packaging of Edge Coupled Silicon Nitride Photonic Integrated Circuits on Glass Substrates for High Performance Interposers

Samuel Serna, Luigi Ranno, Lionel C. Kimerling, Drew M. Weninger et al.
IMAPSource Proceedings
Photonic and Optical Devices
article

Fabrication and Packaging of Edge Coupled Silicon Nitride Photonic Integrated Circuits on Glass Substrates for High Performance Interposers

Samuel Serna, Luigi Ranno, Lionel C. Kimerling, Drew M. Weninger, Anu Agarwal
article en

Abstract

Silicon nitride photonic integrated circuits were fabricated on glass substrates for the first time using reactive ion etched edge facets, demonstrating a minimum propagation loss of 2.4 ± 0.36 dB/cm and minimum edge coupling loss of 2.17 ± 0.79 dB. Two sets of processes were developed: one including high temperature steps (T > 350°C) common to complimentary-metal-oxide-semiconductor (CMOS) foundry front-end-of-line tools and one including low temperature steps (T < 350°C) compatible with CMOS foundry back-end-of-line tools. For both the high and low temperature samples, a CMOS foundry compatible process was also established for dry etching edge facets > 85 𝜇m deep into SiO2 substrates using magnetically enhanced reactive ion etching with amorphous silicon hard masks without metal. Results show the viability of this glass interposer to help achieve Pbps co-packaged optics switch performance by addressing the material limitations of organic or silicon based interposers and enabling pick-and-place assembly of photonic die to package level integrated photonic waveguides.

IMAPSource ProceedingsVol. 2025(Symposium)
Bridgewater State University (US), Massachusetts Institute of Technology (US)
National Science Foundation
Openalex Percentile: Top 66%
Photonic and Optical Devices
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