UCIe Full Signal Integrity Analysis Flow with Compliance Check for Heterogenous Integration
Universal Chiplet Interconnect Express (UCIe) standard is important for the future of advanced packaging and semiconductor system design. This paper explores the trends in the industry and Cadence Design Systems complete analysis solutions with UCIe standard compliance checking and verification. This paper details the analysis solution and design architecture with various testcases from Cadence Design Systems and their customers who continually push the industry standards and challenges the existing analysis capabilities currently available.
Authors
- Steven Mills (ORCID: https://orcid.org/0000-0002-4933-7777)
- Ken Willis
Institutions
- Cadence Design Systems (United States) (US)
Publication Details
- Journal
- IMAPSource Proceedings
- Published
- 2025-11-10
- DOI
- https://doi.org/10.4071/001c.147217
- Primary Topic
- Low-power high-performance VLSI design
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- U.S. Department of Defense