Warpage Analysis of Lidded Flip Chip CSP: Impact of Material Properties and Dimensions
The primary objective of this study was to investigate the influence of various material properties and dimensions on the warpage of lidded flip chip chip-scale packages (fcCSP). While simulation approaches are often more efficient and cost-effective for such studies, accurately predicting warpage remains a significant challenge. Numerous factors are simplified during modeling, which limits the accuracy of the results. As a result, simulation cannot fully replace experimental data. Hence, this study used experimental methods to study warpage in lidded fcCSP. Two test vehicles with package body sizes of 19x19 mm and 21x21mm were used with different die thicknesses, substrate core materials, molding compound (MC) materials, and other packaging variations. The goal was to determine which materials affect warpage the most and what coefficient of thermal expansion (CTE) combinations lead to a fcCSP package within JEDEC warpage specifications. An optical inspection system was used to measure the coplanarity at room temperature, and shadow moiré was used to measure warpage at reflow temperature of 245 °C. Although the simulation may not precisely capture the magnitude of warpage, simplified models (excluding residual stresses, cure shrinkage of MC, spatial non-uniformity in material properties, etc.) were still used to evaluate warpage trends and compared it against experimental data. Results from this study can be utilized to optimize the material set and material properties for large body fcCSP package.
Authors
- Nishant Lakhera
- Sharan Kishore
- J. de Witte
- Jun Chen (ORCID: https://orcid.org/0000-0002-8084-9332)
- Betty Yeung
- Mubsar Dhuka
Institutions
- NXP (Germany) (DE)
Publication Details
- Journal
- IMAPSource Proceedings
- Published
- 2025-11-10
- DOI
- https://doi.org/10.4071/001c.147117
- Primary Topic
- Electronic Packaging and Soldering Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00