Wafer Level Substrates with Si-Core and Hybrid Organic/Inorganic Interconnect

The relentless drive toward higher bandwidth, lower latency, lower power has driven interconnect technologies on substrates that yield small linewidth for signal die-to-die coupled with larger linewidth and thicker Cu lines for power delivery and small pitch assembly. Traditionally this was achieved by using a silicon interposer with small linewidth mounted on a laminate substrate with thick Cu lines for power in a 2.5D integration approach. However, this method introduces additional interconnect layers, parasitics and cost constraints while limiting interposer size. Our results show that a single silicon core substrate can effectively replace both the laminate and the Si interposer by combining a hybrid organic/inorganic interconnect. Moreover dies can now be assembled at <10um pitch using a solderless Cu-Cu thermocompression bonding scheme.