Ka-Band True Time Delay in a $130-\text{nm}$ SiGe-BiCMOS Technology for Phased-Array Applications

This paper presents a study approach for an integrated Ka-band true time delay circuit in 130 nm silicon-germanium (SiGe) BiCMOS technology designed to enhance performance in phased-array systems. It features a two-stage switched transmission line architecture that provides adjustable time delays ranging from 0 ps to 156 ps. Loss compensation amplifiers are integrated into the design to mitigate signal loss before and after each stage, ensuring better signal integrity. The circuit operates with a supply voltage of 3.2 V and has a current consumption of 150 mA, while maintaining compact dimensions of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$2.9 \times 2.8 ~\text{mm}^{2}$</tex>.