Real-Time CARFAC Cochlea Model Acceleration on FPGA for Underwater Acoustic Sensing Systems
This paper presents a real-time, energy-efficient embedded system implementing an array of a Cascade of Asymmetric Resonators with Fast-Acting Compression (CARFAC) cochlea models for underwater sound analysis. Built on the AMD Kria KV260 System-on-Module (SoM), the system integrates a Rust-based software framework on the processor for real-time interfacing and synchronisation with multiple hydrophone inputs, and a hardware-accelerated implementation of the CARFAC models on a Field-Programmable Gate Array (FPGA) for real-time sound preprocessing. Compared to prior work, the CARFAC accelerator achieves improved scalability and processing speed while reducing resource usage through optimised time-multiplexing, pipelined design, and elimination of costly division circuits. Experimental results demonstrate 13.5% hardware utilisation for a single CARFAC instance and a whole board power consumption of 3.11 W when processing a 256 kHz input signal in real time.
Authors
- Stuart Anstee (ORCID: https://orcid.org/0000-0001-8642-0441)
- André van Schaik (ORCID: https://orcid.org/0000-0001-6140-017X)
- Gregory Cohen (ORCID: https://orcid.org/0000-0003-0738-7589)
- Ying Xu (ORCID: https://orcid.org/0009-0000-4385-9710)
- Bram Bremer
- Matthew Bigelow
Institutions
- Defence Science and Technology Group (AU)
- Department of Defence (AU)
- Western Sydney University (AU)
Publication Details
- Published
- 2026-04-21
- DOI
- https://doi.org/10.1109/icassp55912.2026.11463433
- Primary Topic
- Numerical Methods and Algorithms
- Type
- article
- Field-Weighted Citation Impact
- 0.00