A Multiport Transistor Characterisation Technique Including Mutual Inductances Using 2-Port VNA

This paper introduces a novel measurement technique for 4-pin SiC MOSFET transistors with TO-247-4 packaging, accounting for mutual inductances and utilizing a two-port vector network analyzer (VNA). The proposed method involves six distinct measurements to obtain a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{4 x} \text{4}$</tex> S-parameter matrix, which is subsequently reduced by implementing a “virtual ground” in Advanced Design System (ADS) to achieve optimal grounding for one of the transistor's pins. This approach ensures ideal grounding conditions for accurate measurements and allows ease of power and driver gate inductance loops extraction. Additionally, the paper details the RLC extraction process of the evaluated SiC transistor and compares the extracted capacitance values with those specified in the datasheet.