Soft nanocomputing with QCA: Multipurpose sequential circuit realizations of D-latch, SRAM, flip-flop, and down counter

This article presents the design and performance optimization of fundamental sequential circuits, a latch, SRAM, flip-flops, and a two-bit asynchronous down counter, within the Quantum-dot Cellular Automata (QCA) paradigm. As an effective alternative to conventional microelectronics, QCA utilizes quantum dots to encode binary information, promising ultra-low power consumption, higher speed, and superior circuit density while overcoming inherent scaling limitations. A major contribution is that all proposed circuits are realized as multiplexer-based single-layer designs, enhancing their structural simplicity and integrability. These designs, developed using coplanar crossover techniques, were simulated in QCADesigner 2.0.3. The D -latch achieved a 22 % reduction in cell count and a 95 % lower QCA-specific cost. The D flip-flop reduced cell count by 16 % and majority gates by 33 %, while the J K flip-flop cut majority gates by 50 %. The T flip-flop showed significant improvements in area, latency, and cost metrics. The two-bit counter also reduced gate and inverter counts. Energy dissipation analysis with QCADesigner-E confirms these layouts as very efficient, scalable, and high-performance solutions for advanced nanocomputing. • Multipurpose circuits including D-latch, SRAM, flip-flops, and a two-bit counter are designed using Quantum-dot Cellular Automata (QCA) nanocircuitry. • Designs leverage coplanar crossovers and are evaluated through QCADesigner 2.0.3 and QCADesigner-E simulations for functionality and energy dissipation. • D-latch achieves 22% fewer cells and 95% cost reduction; SRAM uses 7% fewer cells. • The T flip-flop achieves 36 % less layout area, 25 % lower latency, and over 60 % improvements in area–delay and QCA-specific cost metrics. • The two-bit ripple down counter reduces majority gates by 25 % and inverters by 33 %, ensuring compact and efficient design.