Cryogenic performance of field-effect transistors and amplifiers based on selective area grown InAs nanowires

Indium-arsenide nanowire field-effect transistors (NWFETs) are promising platforms for high-speed, low-power nanoelectronics operating at cryogenic conditions, relevant for quantum information processing. We use selective area growth of nanowires to realize scalable and planar nanowire device geometries that are compatible with standard semiconductor processing techniques. NWFETs are fabricated, and their low temperature characteristics, including ION/IOFF ratios, threshold voltages, sub-threshold slope, interfacial trap density, hysteresis, and mobility, are characterized. The NWFETs operate effectively in integrated circuitry relying on saturation-mode operation. In sub-threshold applications such as amplifiers, we find bandwidths exceeding our cryostat wiring, but the gate hysteresis presents challenges for precise tuning of the amplifier operating point. We discuss the role of crystal imperfections and fabrication processes on the transistor characteristics and propose strategies for further improvements.

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Publication Details

Journal
Applied Physics Letters
Published
2025-11-10
DOI
https://doi.org/10.1063/5.0299908
Primary Topic
Nanowire Synthesis and Applications
Type
article
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article

Cryogenic performance of field-effect transistors and amplifiers based on selective area grown InAs nanowires

Jordi Arbiol, Giulia Meucci, Christian E. N. Petersen, Sara Martí‐Sánchez et al.
Applied Physics Letters
Nanowire Synthesis and Applications
article

Cryogenic performance of field-effect transistors and amplifiers based on selective area grown InAs nanowires

Jordi Arbiol, Giulia Meucci, Christian E. N. Petersen, Sara Martí‐Sánchez, Daria V. Beznasyuk, Gunjan Nagda, Dāgs Olšteins, Thomas Sand Jespersen, Damon J. Carrad
article en

Abstract

Indium-arsenide nanowire field-effect transistors (NWFETs) are promising platforms for high-speed, low-power nanoelectronics operating at cryogenic conditions, relevant for quantum information processing. We use selective area growth of nanowires to realize scalable and planar nanowire device geometries that are compatible with standard semiconductor processing techniques. NWFETs are fabricated, and their low temperature characteristics, including ION/IOFF ratios, threshold voltages, sub-threshold slope, interfacial trap density, hysteresis, and mobility, are characterized. The NWFETs operate effectively in integrated circuitry relying on saturation-mode operation. In sub-threshold applications such as amplifiers, we find bandwidths exceeding our cryostat wiring, but the gate hysteresis presents challenges for precise tuning of the amplifier operating point. We discuss the role of crystal imperfections and fabrication processes on the transistor characteristics and propose strategies for further improvements.

Applied Physics LettersVol. 127(19)
Institució Catalana de Recerca i Estudis Avançats (ES), University of Copenhagen (DK), Institut Català de Nanociència i Nanotecnologia (ES), Quantum Devices (United States) (US), Technical University of Denmark (DK)
Openalex Percentile: Top 67%
Nanowire Synthesis and Applications
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