A High Data Rate, Wide Dynamic Range Envelope Detector for Short Distance Ultra-Low Power WuRx Applications in 2.4 Ghz ISM-Band

An ultra-low power passive Envelope detector (ED) with differential output adapted for short range communication applications in 2.4 GHz ISM-band is introduced in 18 nm FD-SOI technology. A modified unbalanced Dickson ED multistage configuration is proposed alongside a dynamic back gate biasing technique to operate under a data rate of 62.5 kbps and a maximal input power of 20 dBm while maintaining a high signal-to-noise ratio (SNR) of 18.7 dB and a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$2-\text{mV}$</tex> differential voltage swing at sensitivity level. The circuit uses a calibrated biasing block ensuring a high circuit robustness against process variations. The design is suitable for a wake-up receiver (WuRx) implementation in short range applications by achieving simultaneously a high data rate, high maximal supported signal level and good sensitivity.

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Published
2025-06-22
DOI
https://doi.org/10.1109/newcas64648.2025.11106973
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
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article

A High Data Rate, Wide Dynamic Range Envelope Detector for Short Distance Ultra-Low Power WuRx Applications in 2.4 Ghz ISM-Band

Andreas Kaiser, Antoine Frappé, Michel Ayraud, Oussama Chafai et al.
Radio Frequency Integrated Circuit Design
article

A High Data Rate, Wide Dynamic Range Envelope Detector for Short Distance Ultra-Low Power WuRx Applications in 2.4 Ghz ISM-Band

Andreas Kaiser, Antoine Frappé, Michel Ayraud, Oussama Chafai, Reiner Welk
article en

Abstract

An ultra-low power passive Envelope detector (ED) with differential output adapted for short range communication applications in 2.4 GHz ISM-band is introduced in 18 nm FD-SOI technology. A modified unbalanced Dickson ED multistage configuration is proposed alongside a dynamic back gate biasing technique to operate under a data rate of 62.5 kbps and a maximal input power of 20 dBm while maintaining a high signal-to-noise ratio (SNR) of 18.7 dB and a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$2-\text{mV}$</tex> differential voltage swing at sensitivity level. The circuit uses a calibrated biasing block ensuring a high circuit robustness against process variations. The design is suitable for a wake-up receiver (WuRx) implementation in short range applications by achieving simultaneously a high data rate, high maximal supported signal level and good sensitivity.

Centre National de la Recherche Scientifique (FR), Université de Lille (FR), STMicroelectronics (France) (FR), Institut d'Electronique, de Microélectronique et de Nanotechnologie (FR), Université Polytechnique Hauts-de-France (FR), École Centrale de Lille (FR)
Openalex Percentile: Top 67%
Radio Frequency Integrated Circuit Design
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A High Data Rate, Wide Dynamic Range Envelope Detector for Short Distance Ultra-Low Power WuRx Applications in 2.4 Ghz ISM-Band — Andreas Kaiser, Antoine Frappé, et al. · (2025) | TGRS Research Map | TGRS