Dual-state Hybrid PUF for Resistance to Machine Learning Attacks

A Physical Unclonable Function (PUF) is a lightweight hardware security primitive with diverse applications in Internet of Things (IoT) security. However, the ongoing advancements in machine learning (ML) technologies have significantly impacted the security of PUFs. This paper introduces a dual-state hybrid PUF (DH PUF) that dynamically switches the back-end circuit between a ring oscillator (RO) array and a path selector array based on real-time feedback from a nonlinear front-end circuit. Unlike conventional dual-mode PUFs controlled by static challenges, our design introduces a reverse-order obfuscation mechanism that disrupts the linear correlation between challenges and responses with minimal hardware overhead. The 64-stage DH PUF was implemented on a Xilinx Artix-7 FPGA, and experimental results indicate that the design effectively withstands machine learning attacks. The prediction rates for logistic regression (LR), covariance matrix-adaptive evolutionary strategy (CMA-ES), support vector machine (SVM), and artificial neural network (ANN), deep neural network (DNN) and Multilayer Perceptron (MLP) are all approximately 50%. Additionally, the structure demonstrates a uniqueness of 49.98%, uniformity of 51.32%, and reliability of about 98%. Physically unclonable function, Hardware security, Machine learning, Field-programmable gate array.

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Publication Details

Journal
ACM Transactions on Design Automation of Electronic Systems
Published
2025-11-06
DOI
https://doi.org/10.1145/3774653
Primary Topic
Physical Unclonable Functions (PUFs) and Hardware Security
Type
article
Field-Weighted Citation Impact
0.00
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article

Dual-state Hybrid PUF for Resistance to Machine Learning Attacks

Liang Yao, Yingchun Lu, Jinlin Chen, Zhengfeng Huang et al.
ACM Transactions on Design Automation of Electronic Systems
Physical Unclonable Functions (PUFs) and Hardware Security
article

Dual-state Hybrid PUF for Resistance to Machine Learning Attacks

Liang Yao, Yingchun Lu, Jinlin Chen, Zhengfeng Huang, Huaguo Liang, Xiumin Xu, Jie Huang, Yang Liu
article en

Abstract

A Physical Unclonable Function (PUF) is a lightweight hardware security primitive with diverse applications in Internet of Things (IoT) security. However, the ongoing advancements in machine learning (ML) technologies have significantly impacted the security of PUFs. This paper introduces a dual-state hybrid PUF (DH PUF) that dynamically switches the back-end circuit between a ring oscillator (RO) array and a path selector array based on real-time feedback from a nonlinear front-end circuit. Unlike conventional dual-mode PUFs controlled by static challenges, our design introduces a reverse-order obfuscation mechanism that disrupts the linear correlation between challenges and responses with minimal hardware overhead. The 64-stage DH PUF was implemented on a Xilinx Artix-7 FPGA, and experimental results indicate that the design effectively withstands machine learning attacks. The prediction rates for logistic regression (LR), covariance matrix-adaptive evolutionary strategy (CMA-ES), support vector machine (SVM), and artificial neural network (ANN), deep neural network (DNN) and Multilayer Perceptron (MLP) are all approximately 50%. Additionally, the structure demonstrates a uniqueness of 49.98%, uniformity of 51.32%, and reliability of about 98%. Physically unclonable function, Hardware security, Machine learning, Field-programmable gate array.

ACM Transactions on Design Automation of Electronic Systems
Anhui University (CN), Hefei University of Technology (CN)
Openalex Percentile: Top 64%
Physical Unclonable Functions (PUFs) and Hardware Security
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