PipeDCIM: 28nm $115.11\mathrm{TOPS/mm}^{2}\times \mathrm{TOPS/W}@1.24\mathrm{GHz}$ Pipeline Digital CIM Macro with an Auto-Design Tool for Diverse High-Performance AI Scenarios

Large-scale AI computing requires balancing area and energy efficiency at the high-performance point. Traditional CIM designs often prioritize energy efficiency at the expense of frequency, limiting their applicability to highperformance scenarios. In this work, we propose PipeDCIM, a pipeline digital computing-in-memory macro targeting the FoM of TOPS <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$/ \text{mm}^{2} \times$</tex> TOPS <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$/ \mathrm{W}$</tex>. The contributions include: 1) TSPC-FF pipeline register with an 11T dynamic structure for area efficiency improvement. 2) Slack-power tuning strategy on non-critical pipeline stages for energy efficiency enhancement. 3) Auto-design tool for optimal pipeline architecture exploration and automating the proposed techniques. Two PipeDCIM macros were auto-generated by the tool and fabricated in 28 nm. The best FoM reaches [email protected], achieving 2.96\~{}21.44× improvement over the state-of-the-art CIM macros.