Cryogenic Performance Assessment of FD-SOI Transistors with Counter-Doped Channel

We investigate the cryogenic performance of Fully Depleted Silicon-on-Insulator (FD-SOI) transistors, focusing on devices featuring counter-doped channels. We explore counterdoping as a potential strategy to mitigate the increased threshold voltage at cryogenic temperatures, aiming to reduce power consumption. We extract key performance metrics such as threshold voltage, subthreshold swing, and other relevant parameters from cryogenic measurements, and compare them against conventional FD-SOI devices. Our results demonstrate that counter-doping enables effective threshold voltage control without compromising electrical performance, positioning it as a promising solution for ultra-low-power cryogenic CMOS optimization in scalable quantum computing applications.

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Published
2025-09-08
DOI
https://doi.org/10.1109/esserc66193.2025.11214120
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
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article
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article

Cryogenic Performance Assessment of FD-SOI Transistors with Counter-Doped Channel

Thomas Gneiting, Christian Witt, Heidrun Alius, Phanish Chava et al.
Advancements in Semiconductor Devices and Circuit Design
article

Cryogenic Performance Assessment of FD-SOI Transistors with Counter-Doped Channel

Thomas Gneiting, Christian Witt, Heidrun Alius, Phanish Chava, Maximilian Lederer, Patrick Vliex, Stefan van Waasen, Meng Su, M. Kessler, Maik Simon, P. Javorka, Steffen Lehmann, T. Heide, Dennis Zetzsche
article en

Abstract

We investigate the cryogenic performance of Fully Depleted Silicon-on-Insulator (FD-SOI) transistors, focusing on devices featuring counter-doped channels. We explore counterdoping as a potential strategy to mitigate the increased threshold voltage at cryogenic temperatures, aiming to reduce power consumption. We extract key performance metrics such as threshold voltage, subthreshold swing, and other relevant parameters from cryogenic measurements, and compare them against conventional FD-SOI devices. Our results demonstrate that counter-doping enables effective threshold voltage control without compromising electrical performance, positioning it as a promising solution for ultra-low-power cryogenic CMOS optimization in scalable quantum computing applications.

Forschungszentrum Jülich (DE), GlobalFoundries (United States) (US), Flex (Germany) (DE), Fraunhofer Institute for Photonic Microsystems (DE), GlobalFoundries (Germany) (DE), GlobalFoundries (United Kingdom) (GB)
Openalex Percentile: Top 68%
Advancements in Semiconductor Devices and Circuit Design
DOISourceOpenAlex
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Cryogenic Performance Assessment of FD-SOI Transistors with Counter-Doped Channel — Thomas Gneiting, Christian Witt, et al. · (2025) | TGRS Research Map | TGRS