A 68dB-SNDR, 100-Frame/s CMOS Analog Front-End for a SWIR Detector

For the application of a high-performance shortwave infrared (SWIR) detector, a fully integrated analog front-end (AFE) circuit is proposed in this paper, which includes a readout integrated circuit (ROIC) and a 12-bit/100 kHz two-step single-slope analog-to-digital converter (TS-SS ADC). The ROIC adopts a direct injection (DI) structure with a pixel size of only 10 µm × 10 µm. The column processing circuit uses a passive correlated double-sampling (CDS) circuit to reduce noise and improve dynamic range. The comparator of four inputs in the ADC solves the problem of linearity reduction caused by charge redistribution during coarse quantization. In addition, the current steering digital-to-analog converter (DAC) is used to compensate for the non-ideal characteristics of the switch, which effectively optimizes the differential nonlinearity (DNL) and integral nonlinearity (INL). The AFE is implemented using SMIC 180 nm 1P6M technology. The post-simulation results show that at a power supply voltage of 3.3 V, the AFE has a frame rate of 100 Hz and a full well capacity (FWC) of 2.8 Me−. The linearity can reach 99.59%, and the equivalent output noise is 243 µV. The dynamic range is 73.8 dB. Meanwhile, the signal-to-noise distortion ratio (SNDR) and effective number of bits (ENOB) are 68.38 dB and 11.06 bits, respectively.