Specifying and Compiling Scalable Networks of Actors for Software and Hardware Platforms

Streaming applications are often described using dataflow actor models with a fixed network structure, allowing for static analysis and efficient hardware implementation. However, this fixed structure hinders scalability and design space exploration. This article investigates a representative dataflow toolchain, the StreamBlock compiler for the CAL actor language, along with its Actor Machine (AM) Intermediate Representation (IR), identifying limitations in handling parametric application specifications. To address these limitations, we extend CAL to support parametric actor and network specifications allowing a single description to capture multiple problem sizes. We demonstrate these extensions with a parametric QR Decomposition application and benchmarks from the Savina Actor Benchmark Suite. When compiling actor specifications to software or hardware, the AM IR is used for optimisation purposes. The AM defines a controller specifying how actors should behave at runtime. We show that as the complexity of the actor increases, the AM model scales poorly, leading to compilation failing. In this work, we improve the AM model enabling the compilation of actors up to six times larger than previously possible. For specifications targeting FPGAs, we offer an alternative to the AM designed to take better advantage of available hardware parallelism. Our results show that this controller scales better with the size of the actor compared to the AM controller, reducing latency significantly for a slight increase in resources used. These contributions extend CAL’s applicability, making it easier to specify and scale a broader range of streaming applications.

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Publication Details

Journal
ACM Transactions on Embedded Computing Systems
Published
2025-11-05
DOI
https://doi.org/10.1145/3774886
Primary Topic
Embedded Systems Design Techniques
Type
article
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article

Specifying and Compiling Scalable Networks of Actors for Software and Hardware Platforms

Flavius Gruian, Gareth Callanan
ACM Transactions on Embedded Computing Systems
Embedded Systems Design Techniques
article

Specifying and Compiling Scalable Networks of Actors for Software and Hardware Platforms

Flavius Gruian, Gareth Callanan
article en

Abstract

Streaming applications are often described using dataflow actor models with a fixed network structure, allowing for static analysis and efficient hardware implementation. However, this fixed structure hinders scalability and design space exploration. This article investigates a representative dataflow toolchain, the StreamBlock compiler for the CAL actor language, along with its Actor Machine (AM) Intermediate Representation (IR), identifying limitations in handling parametric application specifications. To address these limitations, we extend CAL to support parametric actor and network specifications allowing a single description to capture multiple problem sizes. We demonstrate these extensions with a parametric QR Decomposition application and benchmarks from the Savina Actor Benchmark Suite. When compiling actor specifications to software or hardware, the AM IR is used for optimisation purposes. The AM defines a controller specifying how actors should behave at runtime. We show that as the complexity of the actor increases, the AM model scales poorly, leading to compilation failing. In this work, we improve the AM model enabling the compilation of actors up to six times larger than previously possible. For specifications targeting FPGAs, we offer an alternative to the AM designed to take better advantage of available hardware parallelism. Our results show that this controller scales better with the size of the actor compared to the AM controller, reducing latency significantly for a slight increase in resources used. These contributions extend CAL’s applicability, making it easier to specify and scale a broader range of streaming applications.

ACM Transactions on Embedded Computing SystemsVol. 25(1)
Lund University (SE)
Openalex Percentile: Top 64%
Embedded Systems Design Techniques
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