Optimizing stencil printing parameters for multiple quality characteristics and diverse packages using a hybrid neural network and linear programming approach

Purpose This study aims to develop a hybrid neural network and linear programming (NN + LP) framework to optimize stencil printing parameters in surface mount technology (SMT) assembly, enhancing soldering quality across multiple quality characteristics (e.g. solder paste volume, area and centroid offset) and diverse component packages [e.g. thin quad flat package (TQFP), R0402 and quad flat no-lead (QFN)]. By addressing limitations in existing single-metric optimization methods, the framework seeks to improve yield and reduce defect-related costs for a Taiwanese printed circuit board (PCB) manufacturer. The approach integrates predictive modeling and multi-objective optimization to achieve robust, component-specific quality improvements, contributing to efficient and reliable SMT manufacturing. Design/methodology/approach This study uses a hybrid NN + LP framework to optimize stencil printing parameters in SMT assembly. Design of experiments identifies critical parameters (e.g. squeegee speed and pressure) affecting multiple quality characteristics (solder paste volume, area and centroid offset) across diverse component packages (e.g. TQFP, R0402 and QFN). An NN predicts quality metrics, while LP optimizes parameters for a composite desirability score. Validation using production data from a Taiwanese PCB manufacturer ensures robust multi-metric optimization, enhancing soldering quality and defect reduction for varied SMT applications. Findings The hybrid NN + LP framework optimized stencil printing parameters, improving soldering quality across multiple quality characteristics and diverse component packages in SMT assembly. Validation with a Taiwanese PCB manufacturer’s production data showed a yield increase from 99.35% to 99.5%, reducing defective units by 150 monthly. This yielded repair cost savings of $3,750/month and warranty reductions of $5,000/year, achieving a 66.67% return on investment. The framework’s multi-metric optimization enhanced defect reduction and reliability, demonstrating scalability for varied SMT applications. Research limitations/implications This study’s hybrid NN + LP framework for optimizing stencil printing in SMT assembly is limited to a medium-scale Taiwanese PCB manufacturer, potentially restricting generalizability to larger or smaller operations. The model assumes consistent production conditions, which may vary across facilities. Validation data focused on specific component packages (e.g. TQFP, R0402 and QFN), limiting applicability to other types. Future research could explore broader package ranges and dynamic production environments. The framework’s success implies scalable, multi-metric optimization strategies for SMT manufacturing, enhancing soldering quality and cost-efficiency across diverse electronics industries. Practical implications The hybrid NN + LP framework offers practical benefits for SMT assembly by optimizing stencil printing parameters to enhance soldering quality across multiple quality characteristics (e.g. volume, area and centroid offset) and diverse component packages. For a Taiwanese PCB manufacturer, it achieved a yield increase from 99.35% to 99.5%, reducing repair costs by $3,750/month and warranty costs by $5,000/year, with a 66.67% ROI. This scalable, multi-metric approach enables electronics manufacturers to improve defect reduction, reliability and cost-efficiency, particularly for high-density components in competitive markets. Social implications The hybrid NN + LP framework for optimizing stencil printing in SMT assembly enhances soldering quality, reducing defects and costs for Taiwanese PCB manufacturers. By improving yield from 99.35% to 99.5%, it supports reliable electronics production, fostering consumer trust in high-quality devices. Cost savings ($3,750/month, $5,000/year) enable manufacturers to maintain competitive pricing, benefiting consumers. The framework’s scalability promotes sustainable manufacturing practices, reducing waste and resource use. It also encourages workforce upskilling in advanced optimization techniques, enhancing job opportunities and technical expertise in Taiwan’s electronics industry, contributing to economic and social stability. Originality/value This study introduces a novel hybrid NN + LP framework for optimizing stencil printing in SMT assembly, uniquely addressing multiple quality characteristics (e.g. volume, area and centroid offset) and diverse component packages (e.g. TQFP, R0402 and QFN). Unlike conventional single-metric methods, it integrates predictive modeling and multi-objective optimization, validated with a Taiwanese PCB manufacturer’s data, achieving a 99.5% yield and $3,750/month savings. Its originality lies in component-specific, multi-metric optimization, offering scalable, cost-effective solutions for electronics manufacturing. The framework’s value enhances soldering quality and industry efficiency, particularly for high-density components.