Gain Enhancement of TFET Source Followers via Structural Optimization for CMOS Image Sensors

In the field of CMOS image sensors (CIS), achieving high resolution while maintaining cost efficiency is a critical challenge. As the demand for high-resolution images in mobile devices continues to grow, preserving cost efficiency in the manufacturing process is increasingly important. To achieve this, it is necessary to extend the source follower (SF) to shorter channels. However, reducing the length of SF channels leads to a decrease in gain, which is a major source of nonlinearity in CIS. This paper presents a comprehensive study on the linearity of SF gain, with an analysis of gain performance through technology computer-aided design (TCAD) modeling and simulation. Compared to conventional n-type metal-oxide-semiconductor field-effect transistors (NMOS) SF, tunnel field-effect transistor (TFET) SF demonstrate superior gain and linearity, although the miniaturization process also results in a significant reduction in gain for TFET SF. To address this, we have analyzed gain improvement through structural optimization of TFET SF. Consequently, the optimized TFET SFs exhibit enhanced gain, and we propose the use of an optimized TFET as the pixel SF to significantly improve the linearity performance of CIS.