A Second-order 8.3-MHz BW Noise-shaping SAR ADC Using Shared Amplifier for Lossless Switched-capacitor Integration

This paper presents an 8.3-MHz second-order noise-shaping successive approximation register (NS-SAR) analog-to-digital converter (ADC). To achieve an ideal second-order noise transfer function (NTF), an integrator combining an amplifier with a ping-pong switched-capacitor (SC) is used. By sharing the amplifier between two integrators, the design reduces the area of the loop filter. Implemented in a 28 nm CMOS process, the prototype achieves a bandwidth of 8.3 MHz while operating at a 100 MHz with an oversampling ratio (OSR) of 6. It achieves a signal-to-noise and distortion ratio (SNDR) of 66.1 dB, and a dynamic range (DR) of 69.8 dB while consuming 2.93 mW from a 1 V supply. The resulting Schreier figure-of-merit (FoM_S) is 160.6 dB, and the Walden FoM (FoM_W) is 107.0 fJ/conversion-step. The active die area occupies 0.101 mm².