A 0.3‐V 62‐dB Bulk‐Driven OTA With Hybrid Frequency Compensation in 65 nm CMOS

ABSTRACT This paper presents a novel 65‐nm CMOS ultra‐low‐voltage (ULV) operational transconductance amplifier (OTA) design. The proposed architecture integrates partial positive feedback (PPF) with a hybrid frequency compensation technique that combines current‐buffer and Miller compensation approaches. This hybrid compensation effectively mitigates the primary limitation of PPF‐based OTAs, that is, their sensitivity to transistor mismatch. Operating at a supply voltage of 0.3 V and consuming just 23.7 nW of power, the two‐stage OTA achieves a rail‐to‐rail input common‐mode range, a DC voltage gain of 61.7 dB, and a gain‐bandwidth product of 12.7 kHz with a 20‐pF load capacitance.

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Publication Details

Journal
International Journal of Circuit Theory and Applications
Published
2025-10-29
DOI
https://doi.org/10.1002/cta.70196
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
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article

A 0.3‐V 62‐dB Bulk‐Driven OTA With Hybrid Frequency Compensation in 65 nm CMOS

Tomasz Kulej, Viera Stopjaková, Fabian Khateb, Daniel Arbet
International Journal of Circuit Theory and Applications
Analog and Mixed-Signal Circuit Design
article

A 0.3‐V 62‐dB Bulk‐Driven OTA With Hybrid Frequency Compensation in 65 nm CMOS

Tomasz Kulej, Viera Stopjaková, Fabian Khateb, Daniel Arbet
article en

Abstract

ABSTRACT This paper presents a novel 65‐nm CMOS ultra‐low‐voltage (ULV) operational transconductance amplifier (OTA) design. The proposed architecture integrates partial positive feedback (PPF) with a hybrid frequency compensation technique that combines current‐buffer and Miller compensation approaches. This hybrid compensation effectively mitigates the primary limitation of PPF‐based OTAs, that is, their sensitivity to transistor mismatch. Operating at a supply voltage of 0.3 V and consuming just 23.7 nW of power, the two‐stage OTA achieves a rail‐to‐rail input common‐mode range, a DC voltage gain of 61.7 dB, and a gain‐bandwidth product of 12.7 kHz with a 20‐pF load capacitance.

International Journal of Circuit Theory and Applications
Slovak University of Technology in Bratislava (SK), Częstochowa University of Technology (PL), Brno University of Technology (CZ), University of Defence (CZ)
Openalex Percentile: Top 69%
Analog and Mixed-Signal Circuit Design
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