Benchmark-Based Study of CPU/GPU Power-Related Features Through JAX and TensorFlow

Energy has become a critical resource in the modern computing landscape, making power management a central focus in High-Performance Computing (HPC) and Artificial Intelligence (AI). While power management techniques like <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Dynamic Voltage and Frequency Scaling (DVFS), Power Capping</i>, and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ACPI/P-State CPU governors</i> are well-established, their effectiveness is significantly influenced by the high-level structure of software frameworks. This paper presents a comprehensive empirical study of this interplay, evaluating the three aforementioned power management techniques on a dual-socket Intel Xeon "Ice Lake" CPU, a single-socket AMD EPYC "Zen3" CPU, and an NVIDIA A100 GPU. We run a suite of computational kernels using both TensorFlow and JAX to expose how framework-specific design choices mediate hardware-level power controls. Our results reveal that the best strategy for energy efficiency is highly context-dependent and relies on the specific combination of hardware, workload, and framework.We find that DVFS is the most effective on both Intel Xeon and AMD EPYC platforms, delivering significant <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Energy-Delay Product (EDP)</i> reductions with minimal performance loss. In contrast, Power Capping is the most efficient technique for NVIDIA A100. A key finding is the notable influence of the software stack; for instance, JAX exhibits operational instability at the lowest GPU frequencies on the A100, while there is no limitation with TensorFlow under identical conditions. Our findings provide operational platform-specific guidance for practitioners, expose crucial robustness considerations for framework developers, and highlight the necessity of considering the software stack as an active variable in energy-aware computing.

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Journal
IEEE Access
Published
2025-01-01
DOI
https://doi.org/10.1109/access.2025.3625414
Citations
1
Primary Topic
Parallel Computing and Optimization Techniques
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article
Field-Weighted Citation Impact
2.27
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article

Benchmark-Based Study of CPU/GPU Power-Related Features Through JAX and TensorFlow

Petr Dokládal, Claude Tadonki, Youssef Mesri, Roblex Nana Tchakoute
1 citations
IEEE Access
Parallel Computing and Optimization Techniques
2.27
article

Benchmark-Based Study of CPU/GPU Power-Related Features Through JAX and TensorFlow

Petr Dokládal, Claude Tadonki, Youssef Mesri, Roblex Nana Tchakoute
article en
1 citations

Abstract

Energy has become a critical resource in the modern computing landscape, making power management a central focus in High-Performance Computing (HPC) and Artificial Intelligence (AI). While power management techniques like <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Dynamic Voltage and Frequency Scaling (DVFS), Power Capping</i>, and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ACPI/P-State CPU governors</i> are well-established, their effectiveness is significantly influenced by the high-level structure of software frameworks. This paper presents a comprehensive empirical study of this interplay, evaluating the three aforementioned power management techniques on a dual-socket Intel Xeon "Ice Lake" CPU, a single-socket AMD EPYC "Zen3" CPU, and an NVIDIA A100 GPU. We run a suite of computational kernels using both TensorFlow and JAX to expose how framework-specific design choices mediate hardware-level power controls. Our results reveal that the best strategy for energy efficiency is highly context-dependent and relies on the specific combination of hardware, workload, and framework.We find that DVFS is the most effective on both Intel Xeon and AMD EPYC platforms, delivering significant <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Energy-Delay Product (EDP)</i> reductions with minimal performance loss. In contrast, Power Capping is the most efficient technique for NVIDIA A100. A key finding is the notable influence of the software stack; for instance, JAX exhibits operational instability at the lowest GPU frequencies on the A100, while there is no limitation with TensorFlow under identical conditions. Our findings provide operational platform-specific guidance for practitioners, expose crucial robustness considerations for framework developers, and highlight the necessity of considering the software stack as an active variable in energy-aware computing.

IEEE AccessVol. 13
Université Paris Sciences et Lettres (FR), Centre de Mise en Forme des Matériaux (FR), Centre de Recherche en Informatique (FR), École Nationale Supérieure des Mines de Paris (FR)
Openalex Percentile: Top 11%
Parallel Computing and Optimization Techniques
2.27
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