Non-destructive lateral cavity etch measurements of 8-superlattice layer nanowire test structures using optical Mueller matrix spectroscopic ellipsometry, x-ray diffraction, and x-ray fluorescence

The semiconductor industry is expected to move to sub-3 nm nodes of gate all around complementary metal–oxide–semiconductor (complementary metal oxide semiconductor) transistor structures in the near future. This scaling is enabled, in part, by utilizing increased numbers of Si/Si1−xGex superlattice layers so that both n-MOS (metal–oxide–semiconductor) and p-MOS transistors come from the same film stack. A key manufacturing step is the selective Si1−xGex lateral cavity etch process. This cavity etch step selectively etches Si1−xGex exposed on the sidewall of the patterned film stack leaving the Si layers unetched, resulting in device structures that cannot be measured using a top-down scanning electron microscope. Accurate, non-destructive measurement is necessary to enable high volume manufacturing of gate all around devices. A set of 8-superlattice layer samples containing nanowire test structure targets were processed with varying amounts of cavity etch. Scatterometry done using Mueller matrix spectroscopic ellipsometry was used to determine the amount of cavity etch. However, it is not always possible to determine cavity etch when key sample attributes such as the film thickness of the superlattice vary across the wafer. A hybrid metrology approach was explored which combined three techniques for accurate measurements. High-resolution x-ray diffraction was used to determine layer thickness measurements, which were fed forward into a scatterometry structural model for a nanowire test structure. The scatterometry-determined cavity etch parameter was verified using x-ray fluorescence measurements of overall germanium volume loss. Transmission electron microscopy reference measurements were taken of lamellae prepared using focused ion beam milling of the sample.