Cryogenic Neuromorphic Synaptic Behavior in 180 nm Silicon Transistors for Emerging Computing Systems

With the advancement of artificial intelligence (AI), there is an increasing demand for high‐speed, energy‐efficient hardware capable of running complex machine learning algorithms. Traditional hardware is constrained by the Von Neumann bottleneck, resulting in high power consumption and slower speeds. Inspired by the human brain, bio‐mimicking the dynamic synaptic plasticity of the biological synapse using synaptic transistors is crucial to building the next generation of high‐performance computing hardware‐based neural networks. This study investigates neuromorphic behavior in 180 nm bulk complementary metal oxide semiconductor (CMOS) devices at 4 K, emphasizing memory properties and synapse‐like characteristics. These findings position bulk CMOS as a scalable, energy‐efficient, cryo‐compatible platform for neuromorphic and quantum computing use. Gated‐pulse measurements are used to study potentiation–depression behavior by quantifying conductance changes as functions of pulse amplitude and width. These results closely resemble biological synaptic plasticity, laying the groundwork for integrating cryo‐CMOS technology into neuromorphic computing. The work reported here aims to work toward the development of hybrid computational systems by bridging the gap between conventional CMOS devices and emerging cryogenic technology, offering new avenues for scalable, energy‐efficient, and high‐performance cryogenic neuromorphic technologies.