Thermal Dynamics of 7 nm FinFET Process Cascode Cross Coupled Double Tail Dynamic Comparator for Future Analog to Digital Converters

The adoption of dynamic regenerative voltage comparators is being driven by the demand for ultra-high speed, area-efficient, and extremely low-power ADCs in order to maximise power efficiency and conversion speed. In this work, thermal dynamics of a 7 nm FinFET process based cascode cross coupled double tail comparator have been investigated for future ADCs. The cascode cross coupled double tail comparator exhibited thermal-inversion effects (TIE) at 7 nm technology at all operating voltages. When the operating temperature (T) was raised from 27 to 107°C, the cross coupled double tail cascode dynamic-voltage-comparator (DVC) simulated with 0.7 V exhibited a 16.44% decrease in delay and 47.43% increase in power. When ΔVIN was elevated from 0.1 to 0.7 V at 27°C, the cross coupled double tail cascode DVC exhibited a 7.04% decrease in delay and an 11.11% decrease in power. The influence of T on the short circuit power of a 7 nm FinFET process based cascode cross coupled double tail comparator has also been investigated.

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Publication Details

Journal
Semiconductors
Published
2025-10-24
DOI
https://doi.org/10.1134/s1063782625602304
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
Field-Weighted Citation Impact
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article

Thermal Dynamics of 7 nm FinFET Process Cascode Cross Coupled Double Tail Dynamic Comparator for Future Analog to Digital Converters

L. M. I. Leo Joseph, Asisa Kumar Panigrahy, J. Ajayan, Sharvani Yedulapuram
Semiconductors
Analog and Mixed-Signal Circuit Design
article

Thermal Dynamics of 7 nm FinFET Process Cascode Cross Coupled Double Tail Dynamic Comparator for Future Analog to Digital Converters

L. M. I. Leo Joseph, Asisa Kumar Panigrahy, J. Ajayan, Sharvani Yedulapuram
article en

Abstract

The adoption of dynamic regenerative voltage comparators is being driven by the demand for ultra-high speed, area-efficient, and extremely low-power ADCs in order to maximise power efficiency and conversion speed. In this work, thermal dynamics of a 7 nm FinFET process based cascode cross coupled double tail comparator have been investigated for future ADCs. The cascode cross coupled double tail comparator exhibited thermal-inversion effects (TIE) at 7 nm technology at all operating voltages. When the operating temperature (T) was raised from 27 to 107°C, the cross coupled double tail cascode dynamic-voltage-comparator (DVC) simulated with 0.7 V exhibited a 16.44% decrease in delay and 47.43% increase in power. When ΔVIN was elevated from 0.1 to 0.7 V at 27°C, the cross coupled double tail cascode DVC exhibited a 7.04% decrease in delay and an 11.11% decrease in power. The influence of T on the short circuit power of a 7 nm FinFET process based cascode cross coupled double tail comparator has also been investigated.

SemiconductorsVol. 59(11)
ICFAI Foundation for Higher Education (IN)
Openalex Percentile: Top 70%
Analog and Mixed-Signal Circuit Design
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