Highly Reliable MoS <sub>2</sub> Flash Memory with Ultrathin TaO <sub> <i>x</i> </sub> Tunneling Layer Formed via Partial Oxidation of TaS <sub>2</sub> Floating Gate

Two-dimensional (2D) transition metal dichalcogenides (TMDs) are regarded as promising candidates for next-generation semiconductor devices due to their atomically thin structure enabling highly efficient short channel effect-free electrostatic control. In particular, low power consumption and high reliability induced by ultrathin heterostructures with clean van der Waal interfaces make 2D TMDs highly attractive for flash memory applications. Among the TMDs, tantalum disulfide (TaS<sub>2</sub>) behaves as a metal with a work function of ∼5.6 eV and readily undergoes oxidation. In this study, we propose a 2D MoS<sub>2</sub> flash memory device incorporating the oxidation property of TaS<sub>2</sub>, which is used for charge trapping. We found that a thickness-controlled high-quality tantalum oxide (TaO<sub><i>x</i></sub>) layer is formed on the surface of TaS<sub>2</sub> through time- and temperature-adjusted ultraviolet ozone (UVO) treatments, serving as a tunneling insulator in a charge trapping stack. This approach produces a precisely controlled TaO<sub><i>x</i></sub> tunneling layer, achieving a large hysteresis-to-gate sweep range ratio of 74.3% and a reliable retention with an on/off current ratio exceeding 10<sup>3</sup> after 10,000 s in a flash memory device with MoS<sub>2</sub> channel. Effects of oxide thickness, controlled by temperature during UVO treatment, on charge trapping properties and hysteresis behavior were systematically investigated to obtain the best memory characteristics. Furthermore, the TaO<sub><i>x</i></sub>/TaS<sub>2</sub> charge trapping stack is demonstrated to be universally applicable to the other 2D TMD WSe<sub>2</sub>. These results suggest that the proposed UVO-based self-formation of charge trapping and tunneling layers in 2D metals represents a promising strategy for achieving high reliability and performance in flash memory devices, contributing significantly to advancements in 2D material-based memory technologies.

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Publication Details

Journal
ACS Nano
Published
2025-10-23
DOI
https://doi.org/10.1021/acsnano.5c14262
Primary Topic
Advanced Memory and Neural Computing
Type
article
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article

Highly Reliable MoS 2 Flash Memory with Ultrathin TaO x Tunneling Layer Formed via Partial Oxidation of TaS 2 Floating Gate

Hoseong Shin, Boseok Kang, Min Sup Choi, Kwangro Lee et al.
ACS Nano
Advanced Memory and Neural Computing
article

Highly Reliable MoS 2 Flash Memory with Ultrathin TaO x Tunneling Layer Formed via Partial Oxidation of TaS 2 Floating Gate

Hoseong Shin, Boseok Kang, Min Sup Choi, Kwangro Lee, Gil‐Ho Kim, Young‐Hoon Song, Won Jong Yoo, Jae‐Hoon Lee, Danbi Lee, Nasir Ali, Hyungyu Choi
article en

Abstract

Two-dimensional (2D) transition metal dichalcogenides (TMDs) are regarded as promising candidates for next-generation semiconductor devices due to their atomically thin structure enabling highly efficient short channel effect-free electrostatic control. In particular, low power consumption and high reliability induced by ultrathin heterostructures with clean van der Waal interfaces make 2D TMDs highly attractive for flash memory applications. Among the TMDs, tantalum disulfide (TaS<sub>2</sub>) behaves as a metal with a work function of ∼5.6 eV and readily undergoes oxidation. In this study, we propose a 2D MoS<sub>2</sub> flash memory device incorporating the oxidation property of TaS<sub>2</sub>, which is used for charge trapping. We found that a thickness-controlled high-quality tantalum oxide (TaO<sub><i>x</i></sub>) layer is formed on the surface of TaS<sub>2</sub> through time- and temperature-adjusted ultraviolet ozone (UVO) treatments, serving as a tunneling insulator in a charge trapping stack. This approach produces a precisely controlled TaO<sub><i>x</i></sub> tunneling layer, achieving a large hysteresis-to-gate sweep range ratio of 74.3% and a reliable retention with an on/off current ratio exceeding 10<sup>3</sup> after 10,000 s in a flash memory device with MoS<sub>2</sub> channel. Effects of oxide thickness, controlled by temperature during UVO treatment, on charge trapping properties and hysteresis behavior were systematically investigated to obtain the best memory characteristics. Furthermore, the TaO<sub><i>x</i></sub>/TaS<sub>2</sub> charge trapping stack is demonstrated to be universally applicable to the other 2D TMD WSe<sub>2</sub>. These results suggest that the proposed UVO-based self-formation of charge trapping and tunneling layers in 2D metals represents a promising strategy for achieving high reliability and performance in flash memory devices, contributing significantly to advancements in 2D material-based memory technologies.

ACS NanoVol. 19(43)
Chungnam National University (KR), Institute of Nanotechnology (GB), Sungkyunkwan University (KR)
Openalex Percentile: Top 70%
Advanced Memory and Neural Computing
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