A Novel DST-IV Efficient Parallel Implementation with Low Arithmetic Complexity
Discrete sine transform (DST) has numerous applications across various fields, including signal processing, image compression and coding, adaptive digital filtering, mathematics (such as partial differential equations or numerical solutions of differential equations), image reconstruction, and classification, among others. The primary disadvantage of DST class algorithms (DST-I, DST-II, DST-III, and DST-IV) is their substantial computational complexity (O (N log N)) during implementation. This paper proposes an innovative decomposition and real-time implementation for the DST-IV. This decomposition facilitates the execution of the algorithm in four or eight sections operating concurrently. These algorithms, which encompass 4 and 8 sections, are primarily developed using a matrix factorization technique to decompose the DST-IV matrices. Consequently, the computational complexity and execution time of the developed algorithms are markedly reduced compared to the traditional implementation of DST-IV, resulting in significant time efficiency. The performance analysis conducted on three distinct Graphics Processing Unit (GPU) architectures indicates that a substantial speedup can be achieved. An average speedup ranging from 22.42 to 65.25 was observed, depending on the GPU architecture employed and the DST-IV implementation (with 4 or 8 sections).
Authors
- Doru Florin Chiper (ORCID: https://orcid.org/0000-0002-3322-4663)
- Dan-Marius Dobrea (ORCID: https://orcid.org/0000-0003-1657-9494)
Institutions
- Academia Oamenilor de Știință din România (RO)
- Gheorghe Asachi Technical University of Iași (RO)
- Romanian Academy (RO)
Publication Details
- Journal
- Electronics
- Published
- 2025-10-22
- DOI
- https://doi.org/10.3390/electronics14214137
- Primary Topic
- Numerical Methods and Algorithms
- Type
- article
- Field-Weighted Citation Impact
- 0.00