NPDP programming for RISC multi-core processors

In recent years, parallel architectures have become ubiquitous due to advancements in AI and cloud computing.However, parallel processing is not limited to x86 CISC CPUs and advanced graphics cards, GPUs; it also includes computations on ARM-based and RISC-V devices.In recent years, ARM processors have been adapted to incorporate an increasing number of cores.Today, mobile devices feature at least eight execution units, typically divided into energy-efficient and performance-oriented groups.RISC-based parallel processors are also integrated on development boards supported by the Linux kernel.In this article, we tested our NPDP Benchmark Suite for non-serial polyadic dynamic programming, primarily in the field of computer algorithms and bioinformatics, to evaluate the performance of the RISC processors under study, as well as code locality and cache efficiency.The benchmark consists of 10 kernels written in C++ and OpenMP.In the Android environment, we used the JAVA NDK (Native Development Kit) to port the application.For Apple machines, we used a port to OpenMP for parallelization.For the RISC-V native Linux environment, we applied the native Linux setup for efficient execution.Finally, we summarized the article and outlined future work.