PoCo: Extending Task-Parallel HLS Programming with Shared Multi- <i>P</i> r <i>o</i> ducer Multi- <i>Co</i> nsumer Buffer Support

Advancements in High-Level Synthesis (HLS) tools have enabled task-level parallelism on FPGAs. However, prevailing frameworks predominantly employ Single-Producer-Single-Consumer (SPSC) models for task communication, thus limiting application scenarios. Analysis of designs becomes non-trivial with an increasing number of tasks in task-parallel systems. Adding features to existing designs often requires re-profiling of several task interfaces, redesign of the overall inter-task connectivity, and describing a new floorplan. This article proposes PoCo, a novel framework to design scalable Multi-Producer-Multi-Consumer (MPMC) models on task-parallel systems. PoCo introduces a shared-buffer abstraction that facilitates dynamic and high-bandwidth access to share on-chip memory resources, incorporates latency-insensitive communication, and implements placement-aware design strategies to mitigate routing congestion. The frontend provides convenient APIs to access the buffer memory, while the backend features an optimized and pipelined datapath. Empirical evaluations demonstrate that PoCo achieves up to 50% reduction in on-chip memory utilization on SPSC models without performance degradation. Additionally, three case studies on distinct real-world applications reveal up to 1.5 \(\times\) frequency improvements and simplified dataflow management in heterogeneous FPGA accelerator designs.

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Publication Details

Journal
ACM Transactions on Reconfigurable Technology and Systems
Published
2025-10-21
DOI
https://doi.org/10.1145/3771938
Primary Topic
Parallel Computing and Optimization Techniques
Type
article
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article

PoCo: Extending Task-Parallel HLS Programming with Shared Multi- P r o ducer Multi- Co nsumer Buffer Support

Akhil Raj Baranwal, Zhenman Fang
ACM Transactions on Reconfigurable Technology and Systems
Parallel Computing and Optimization Techniques
article

PoCo: Extending Task-Parallel HLS Programming with Shared Multi- P r o ducer Multi- Co nsumer Buffer Support

Akhil Raj Baranwal, Zhenman Fang
article en

Abstract

Advancements in High-Level Synthesis (HLS) tools have enabled task-level parallelism on FPGAs. However, prevailing frameworks predominantly employ Single-Producer-Single-Consumer (SPSC) models for task communication, thus limiting application scenarios. Analysis of designs becomes non-trivial with an increasing number of tasks in task-parallel systems. Adding features to existing designs often requires re-profiling of several task interfaces, redesign of the overall inter-task connectivity, and describing a new floorplan. This article proposes PoCo, a novel framework to design scalable Multi-Producer-Multi-Consumer (MPMC) models on task-parallel systems. PoCo introduces a shared-buffer abstraction that facilitates dynamic and high-bandwidth access to share on-chip memory resources, incorporates latency-insensitive communication, and implements placement-aware design strategies to mitigate routing congestion. The frontend provides convenient APIs to access the buffer memory, while the backend features an optimized and pipelined datapath. Empirical evaluations demonstrate that PoCo achieves up to 50% reduction in on-chip memory utilization on SPSC models without performance degradation. Additionally, three case studies on distinct real-world applications reveal up to 1.5 \(\times\) frequency improvements and simplified dataflow management in heterogeneous FPGA accelerator designs.

ACM Transactions on Reconfigurable Technology and SystemsVol. 18(4)
Simon Fraser University (CA)
Openalex Percentile: Top 67%
Parallel Computing and Optimization Techniques
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PoCo: Extending Task-Parallel HLS Programming with Shared Multi- <i>P</i> r <i>o</i> ducer Multi- <i>Co</i> nsumer Buffer Support — Akhil Raj Baranwal, Zhenman Fang · ACM Transactions on Reconfigurable Technology and Systems (2025) | TGRS Research Map | TGRS