RelaxCIM: A Power- and Area-Efficient RxO-based Readout Cell for ADC-less CIM Accelerators

Compute-In-Memory (CIM) architectures are becoming standard solutions for accelerating AI workloads. Yet, the performance of analog CIM cores is generally constrained by the quantization resolution and energy consumption of the readout stage, typically dominated by Analog-to-Digital Converters (ADCs). To address this issue, we present RelaxCIM, a compact, low-power readout approach that replaces traditional resource-intensive ADCs with a Relaxation Oscillator (RxO) and a digital counter for current-based CIM accelerators. Implemented in 65 nm CMOS, each RxO-based cell occupies $0.0015 \mathrm{~mm}^{2}$, consumes an average power of 0.21 mW, and achieves a resolution of 100 nA per Least-Significant Bit (LSB) at a 100 MHz counting frequency. This fine resolution is particularly beneficial for large neural networks mapped onto small CIM arrays employing time-multiplexed Vector-Matrix Multiplication (VMM) and partialsum operations, effectively reducing quantization errors and finite-precision limitations.