A 127-163 GHz LNA with in-band 21-dB gain and 6.8-dB NF in a 55-nm SiGe BiCMOS technology

This article presents the design of a low-noise amplifier (LNA) in a $55-\mathrm{nm}$ SiGe BiCMOS technology targeting high-data-rate applications. The sizing and biasing of the heterojunction bipolar transistor (HBT) are discussed and a design flow is proposed which avoids the systematic use of electromagnetic (EM) solvers. On the one hand, a parametric model for transmission lines addresses the need for design variables while having a good correspondence with EM simulations. On the other hand, a graphical method is proposed to realize a trade-off between noise and conjugate input impedance matching. A complete postlayout simulation of the LNA is performed, showing a 127 163 GHz bandwidth, with a maximum gain of 24 dB and a noise figure below 6.8 dB for $20-\mathrm{mW}$ power consumption. Passive components such as capacitors are measured and compared to the EM simulations.

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Published
2025-09-21
DOI
https://doi.org/10.1109/prime66228.2025.11203420
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
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article

A 127-163 GHz LNA with in-band 21-dB gain and 6.8-dB NF in a 55-nm SiGe BiCMOS technology

Sylvain Bourdel, H. Barthélemy, Jean‐Michel Fournier, Florence Podevin et al.
Radio Frequency Integrated Circuit Design
article

A 127-163 GHz LNA with in-band 21-dB gain and 6.8-dB NF in a 55-nm SiGe BiCMOS technology

Sylvain Bourdel, H. Barthélemy, Jean‐Michel Fournier, Florence Podevin, Pierre-Louis Hellier
article en

Abstract

This article presents the design of a low-noise amplifier (LNA) in a $55-\mathrm{nm}$ SiGe BiCMOS technology targeting high-data-rate applications. The sizing and biasing of the heterojunction bipolar transistor (HBT) are discussed and a design flow is proposed which avoids the systematic use of electromagnetic (EM) solvers. On the one hand, a parametric model for transmission lines addresses the need for design variables while having a good correspondence with EM simulations. On the other hand, a graphical method is proposed to realize a trade-off between noise and conjugate input impedance matching. A complete postlayout simulation of the LNA is performed, showing a 127 163 GHz bandwidth, with a maximum gain of 24 dB and a noise figure below 6.8 dB for $20-\mathrm{mW}$ power consumption. Passive components such as capacitors are measured and compared to the EM simulations.

Centre National de la Recherche Scientifique (FR), Université de Toulon (FR), Techniques of Informatics and Microelectronics for Integrated Systems Architecture (FR), Université Grenoble Alpes (FR)
Openalex Percentile: Top 70%
Radio Frequency Integrated Circuit Design
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