A CMOS Full-Wave Envelope Detector for OOK Signals in Power-Line Communication

In this paper, an envelope detector designed in a $0.18-\mu \mathrm{m}$ standard CMOS process is presented. The proposed design is suitable for use in an OOK (On-Off Keying) receiver targeting Power Line Communication (PLC) applications. The detector is capable of tracking OOK signals with carrier frequencies equal to 10 MHz, supporting data rates up to 200 kHz. Detectable input signals span from $300 \mathrm{mV}_{\text {pp }}$ up to peak-to-peak amplitude equal to the supply voltage of 3.3 V. Performances of the proposed architecture have been evaluated through extensive electrical simulations. Robustness of the design has been demonstrated under temperature variations and in the presence of global and local random process variations, simulated through sets of Monte Carlo runs.

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Publication Details

Published
2025-09-21
DOI
https://doi.org/10.1109/prime66228.2025.11203649
Citations
1
Primary Topic
Power Line Communications and Noise
Type
article
Field-Weighted Citation Impact
0.73
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article

A CMOS Full-Wave Envelope Detector for OOK Signals in Power-Line Communication

Michele Dei, Paolo Bruschi, Francesco Gagliardi, Iacopo Nannipieri
1 citations
Power Line Communications and Noise
0.73
article

A CMOS Full-Wave Envelope Detector for OOK Signals in Power-Line Communication

Michele Dei, Paolo Bruschi, Francesco Gagliardi, Iacopo Nannipieri
article en
1 citations

Abstract

In this paper, an envelope detector designed in a $0.18-\mu \mathrm{m}$ standard CMOS process is presented. The proposed design is suitable for use in an OOK (On-Off Keying) receiver targeting Power Line Communication (PLC) applications. The detector is capable of tracking OOK signals with carrier frequencies equal to 10 MHz, supporting data rates up to 200 kHz. Detectable input signals span from $300 \mathrm{mV}_{\text {pp }}$ up to peak-to-peak amplitude equal to the supply voltage of 3.3 V. Performances of the proposed architecture have been evaluated through extensive electrical simulations. Robustness of the design has been demonstrated under temperature variations and in the presence of global and local random process variations, simulated through sets of Monte Carlo runs.

University of Pisa (IT)
Openalex Percentile: Top 22%
Power Line Communications and Noise
0.73
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